This drives the PMAC between the GSWIP Switch and the CPU in the VRX200
SoC. This is currently only the very basic version of the Ethernet
driver.
Signed-off-by: Hauke Mehrtens
---
MAINTAINERS | 2 +
arch/mips/lantiq/xway/sysctrl.c | 2 +-
drivers/net/ethernet/K
On 21/07/18 21:13, Hauke Mehrtens wrote:
+ * Copyright (C) 2012 John Crispin
that is not my mail addr :-)
John
On 07/21/2018 10:25 PM, John Crispin wrote:
>
>
> On 21/07/18 21:13, Hauke Mehrtens wrote:
>> + * Copyright (C) 2012 John Crispin
> that is not my mail addr :-)
> John
Thanks for the information, I fixed your mail address.
Hauke
Hi Hauke,
On Sat, Jul 21, 2018 at 09:13:57PM +0200, Hauke Mehrtens wrote:
> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
> index e0af39b33e28..c704312ef7d5 100644
> --- a/arch/mips/lantiq/xway/sysctrl.c
> +++ b/arch/mips/lantiq/xway/sysctrl.c
> @@ -536,7 +536,7 @@
Hi Paul,
On 07/24/2018 02:34 AM, Paul Burton wrote:
> Hi Hauke,
>
> On Sat, Jul 21, 2018 at 09:13:57PM +0200, Hauke Mehrtens wrote:
>> diff --git a/arch/mips/lantiq/xway/sysctrl.c
>> b/arch/mips/lantiq/xway/sysctrl.c
>> index e0af39b33e28..c704312ef7d5 100644
>> --- a/arch/mips/lantiq/xway/sysct
> + /* Make sure the firmware of the embedded GPHY is loaded before,
> + * otherwise they will not be detectable on the MDIO bus.
> + */
> + of_for_each_phandle(&it, err, np, "lantiq,phys", NULL, 0) {
> + phy_np = it.node;
> + if (phy_np) {
> +
On 07/25/2018 05:28 PM, Andrew Lunn wrote:
>> +/* Make sure the firmware of the embedded GPHY is loaded before,
>> + * otherwise they will not be detectable on the MDIO bus.
>> + */
>> +of_for_each_phandle(&it, err, np, "lantiq,phys", NULL, 0) {
>> +phy_np = it.node;
>>
On Sun, Jul 29, 2018 at 04:03:10PM +0200, Hauke Mehrtens wrote:
> On 07/25/2018 05:28 PM, Andrew Lunn wrote:
> >> + /* Make sure the firmware of the embedded GPHY is loaded before,
> >> + * otherwise they will not be detectable on the MDIO bus.
> >> + */
> >> + of_for_each_phandle(&it, err, n
On 07/29/2018 05:51 PM, Andrew Lunn wrote:
> On Sun, Jul 29, 2018 at 04:03:10PM +0200, Hauke Mehrtens wrote:
>> On 07/25/2018 05:28 PM, Andrew Lunn wrote:
+ /* Make sure the firmware of the embedded GPHY is loaded before,
+ * otherwise they will not be detectable on the MDIO bus.
> I am thinking about merging this into the switch driver, then we do not
> have to configure the dependency any more.
Hi Hauke
Are there any PHYs which are not part of the switch?
Making it part of the switch driver would make sense. Are there any
backwards compatibility issues? I don't actuall
On 07/29/2018 06:40 PM, Andrew Lunn wrote:
>> I am thinking about merging this into the switch driver, then we do not
>> have to configure the dependency any more.
>
> Hi Hauke
>
> Are there any PHYs which are not part of the switch?
The embedded PHYs are only connected to the switch in this SoC
> The embedded PHYs are only connected to the switch in this SoC and on
> all other SoCs from this line I am aware of.
Hi Hauke
O.K, then it makes sense to have it part of the switch driver.
> The firmware is 64KBytes big and we have to load that into continuous
> memory which is then used by th
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