This patch implements code-gen for BPF_ALU | BPF_ARSH | BPF_*.
Cc: Naveen N. Rao
Cc: Sandipan Das
Signed-off-by: Jiong Wang
---
arch/powerpc/include/asm/ppc-opcode.h | 2 ++
arch/powerpc/net/bpf_jit.h| 4
arch/powerpc/net/bpf_jit_comp64.c | 6 ++
3 files changed, 12 in
Hi Jiong,
On 05/12/18 2:25 AM, Jiong Wang wrote:
> This patch implements code-gen for BPF_ALU | BPF_ARSH | BPF_*.
>
> Cc: Naveen N. Rao
> Cc: Sandipan Das
> Signed-off-by: Jiong Wang
> ---
[...]
> diff --git a/arch/powerpc/net/bpf_jit_comp64.c
> b/arch/powerpc/net/bpf_jit_comp64.c
> index 174
Sandipan Das writes:
> Hi Jiong,
>
> On 05/12/18 2:25 AM, Jiong Wang wrote:
>> This patch implements code-gen for BPF_ALU | BPF_ARSH | BPF_*.
>>
>> Cc: Naveen N. Rao
>> Cc: Sandipan Das
>> Signed-off-by: Jiong Wang
>> ---
> [...]
>> diff --git a/arch/powerpc/net/bpf_jit_comp64.c
>> b/arch/p
From: Jiong Wang
Date: Wed, 05 Dec 2018 11:28:32 +
> Indeed. Doubled checked the ISA doc,"Bit 32 of RS is replicated to fill
> RA0:31.".
>
> Will fix both places in v2.
See, sparc64 isn't so weird :-)