Hi Andrew,
Andrew Lunn writes:
> -static int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
> - int reg, u16 *val)
> +int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
> +int reg, u16 *val)
> {
> int addr = phy; /* PHY dev
The mv88e6390X family has 8 SERDES lanes. These can be used for 2
10Gbps ports, ports 9 or 10. If these ports are used at slower speeds,
the SERDES lanes become available for other ports for 1000Base-X.
Signed-off-by: Andrew Lunn
---
drivers/net/dsa/mv88e6xxx/chip.c | 28 +++
drivers/n
