Re: [PATCH net-next v3 2/4] phylib: add reset after clk enable support

2017-12-05 Thread Richard Leitner
Hi Andrew, On 12/05/2017 06:34 PM, Andrew Lunn wrote: On Tue, Dec 05, 2017 at 02:25:58PM +0100, Richard Leitner wrote: From: Richard Leitner Some PHYs need the refclk to be a continuous clock. Therefore they don't allow turning it off and on again during operation. Nonetheless such a clock sw

Re: [PATCH net-next v3 2/4] phylib: add reset after clk enable support

2017-12-05 Thread Andrew Lunn
On Tue, Dec 05, 2017 at 02:25:58PM +0100, Richard Leitner wrote: > From: Richard Leitner > > Some PHYs need the refclk to be a continuous clock. Therefore they don't > allow turning it off and on again during operation. Nonetheless such a > clock switching is performed by some ETH drivers (namely

[PATCH net-next v3 2/4] phylib: add reset after clk enable support

2017-12-05 Thread Richard Leitner
From: Richard Leitner Some PHYs need the refclk to be a continuous clock. Therefore they don't allow turning it off and on again during operation. Nonetheless such a clock switching is performed by some ETH drivers (namely FEC [1]) for power saving reasons. An example for an affected PHY is the S