On Wed, 2006-04-12 at 00:30 +0200, Benoit Boissinot wrote:
> On Wed, Apr 12, 2006 at 08:21:17AM +1000, Benjamin Herrenschmidt wrote:
> >
> > > I still think we shouldn't reward shit hardware by complicating
> > > up our DMA mappings internals. :-)
> >
> > BTW. In the meantime, can't that driver w
On Wed, Apr 12, 2006 at 08:21:17AM +1000, Benjamin Herrenschmidt wrote:
>
> > I still think we shouldn't reward shit hardware by complicating
> > up our DMA mappings internals. :-)
>
> BTW. In the meantime, can't that driver work in PIO only mode ?
yes, I think you just have to have the pci_set_
On Tue, 2006-04-11 at 14:34 -0700, David S. Miller wrote:
> I still think we shouldn't reward shit hardware by complicating
> up our DMA mappings internals. :-)
Heh, it's a good point but in that specific case, it's a bit difficult
to tell that to users who don't have a choice of what card to put
> I still think we shouldn't reward shit hardware by complicating
> up our DMA mappings internals. :-)
BTW. In the meantime, can't that driver work in PIO only mode ?
Ben.
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From: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
Date: Wed, 12 Apr 2006 06:49:00 +1000
> I would tend to agree... except that the broadcom is _the_ wireless
> card shipped by Apple with all of their machines for the last few
> years, and thus, the problem will be hit by pretty much any G5 user
> t
> I think allowing DMA mask range limiting in the IOMMU layer is going
> to set a very bad precedence, just don't do it.
>
> It's 2006, we should be way past the era of not putting the full 32
> PCI DMA address bits in devices. In this day and age it is simply
> inexscusable.
>
> Maybe we could
From: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
Date: Tue, 11 Apr 2006 11:46:12 +1000
> But ppc64 hits the problem and at this point, there is nothing
> I can do other than either implementing a split zone allocation mecanism
> in the ppc64 architecture for the sole sake of bcm43xx (ick !) or doi
On Tue, Apr 11, 2006 at 03:53:51AM +0200, Michael Buesch wrote:
> On Tuesday 11 April 2006 03:46, you wrote:
> >
> >
> > Now, for ppc32, it should still sort-of work because all of lowmem is
> > below 1Gb and people generally don't hack their lowmem size (well, I do
> > but heh, that doesn't coun
> The hacks i see there is reallocating a buffer with GFP_DMA, so that
> means that if the ppc dma_alloc_coherent did the same thing as the i386
> counterpart (adding GFP_DMA if dma_mask is less than 32bits) it should
> work, no ?
Except that GFP_DMA covers the whole address space on ppc64...
Be
> Yes, I know they hit the message, that's from a message in some forum
> that i got interested in the issue. It probably comes from an allocation
> from:
> http://www.linux-m32r.org/lxr/http/source/arch/powerpc/kernel/pci_direct_iommu.c#L32
>
> Either the ppc code is wrong (it doesn't enforce dm
On Mon, 2006-04-10 at 09:46 -0400, John W. Linville wrote:
> On Mon, Apr 10, 2006 at 06:28:00AM +0200, Michael Buesch wrote:
>
> > To summerize: I actually added these messages, because people were
> > hitting "this does not work with >1G" issues and did not get an error
> > message.
> > So I dec
From: Benoit Boissinot <[EMAIL PROTECTED]>
Date: Tue, 11 Apr 2006 00:13:59 +0200
> On Mon, Apr 10, 2006 at 09:46:30AM -0400, John W. Linville wrote:
> > On Mon, Apr 10, 2006 at 06:28:00AM +0200, Michael Buesch wrote:
> >
> > > To summerize: I actually added these messages, because people were
> >
On Mon, Apr 10, 2006 at 09:46:30AM -0400, John W. Linville wrote:
> On Mon, Apr 10, 2006 at 06:28:00AM +0200, Michael Buesch wrote:
>
> > To summerize: I actually added these messages, because people were
> > hitting "this does not work with >1G" issues and did not get an error
> > message.
> > S
On Mon, Apr 10, 2006 at 06:28:00AM +0200, Michael Buesch wrote:
> To summerize: I actually added these messages, because people were
> hitting "this does not work with >1G" issues and did not get an error message.
> So I decided to insert warnings until the issue is fixed inside the arch code.
> I
On Mon, Apr 10, 2006 at 06:28:00AM +0200, Michael Buesch wrote:
> On Monday 10 April 2006 06:22, you wrote:
> > Either the ppc code is wrong (it doesn't enforce dma_mask) either the
> > driver still works without the check.
> >
> > Maybe ppc should do the same thing as i386:
> >
> > 47 if
On Mon, Apr 10, 2006 at 06:07:32AM +0200, Michael Buesch wrote:
> On Monday 10 April 2006 06:01, you wrote:
> > Since the driver already sets the correct dma_mask, there is no reason
> > to bail there. In fact if you have an iommu, I think you can have a
> > address above 1G which will be ok for th
Since the driver already sets the correct dma_mask, there is no reason
to bail there. In fact if you have an iommu, I think you can have a
address above 1G which will be ok for the device (if it isn't true then
the powerpc dma_alloc_coherent with iommu needs to be fixed because it
doesn't respect t
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