From: Alexei Starovoitov
Date: Tue, 4 Dec 2018 12:16:04 -0800
> You already did :)
Amazing, I'll take the rest of the day off, thanks! :)
From: Jiong Wang
Date: Tue, 4 Dec 2018 20:14:11 +
> On 04/12/2018 20:10, David Miller wrote:
>> From: Alexei Starovoitov
>> Date: Tue, 4 Dec 2018 11:29:55 -0800
>>
>>> I guess sparc doesn't really have 32 subregisters. All registers
>>> are considered 64-bit. It has 32-bit alu ops on 64-bit
On Tue, Dec 04, 2018 at 12:10:05PM -0800, David Miller wrote:
> From: Alexei Starovoitov
> Date: Tue, 4 Dec 2018 11:29:55 -0800
>
> > I guess sparc doesn't really have 32 subregisters. All registers
> > are considered 64-bit. It has 32-bit alu ops on 64-bit registers
> > instead.
>
> Right.
>
On 04/12/2018 20:10, David Miller wrote:
From: Alexei Starovoitov
Date: Tue, 4 Dec 2018 11:29:55 -0800
I guess sparc doesn't really have 32 subregisters. All registers
are considered 64-bit. It has 32-bit alu ops on 64-bit registers
instead.
Right.
Anyways, sparc will require two instructio
From: Alexei Starovoitov
Date: Tue, 4 Dec 2018 11:29:55 -0800
> I guess sparc doesn't really have 32 subregisters. All registers
> are considered 64-bit. It has 32-bit alu ops on 64-bit registers
> instead.
Right.
Anyways, sparc will require two instructions because of this, the
'sra' then a '
On Tue, Dec 04, 2018 at 11:42:54AM -0800, Jakub Kicinski wrote:
> On Tue, 4 Dec 2018 11:29:55 -0800, Alexei Starovoitov wrote:
> > Regarding the set... It looks good to me. Pls resubmit without RFC tag
> > and probably include mips patch as patch 1, so we can apply the whole
> > thing to bpf-next.
On Tue, 4 Dec 2018 11:29:55 -0800, Alexei Starovoitov wrote:
> Regarding the set... It looks good to me. Pls resubmit without RFC tag
> and probably include mips patch as patch 1, so we can apply the whole
> thing to bpf-next. git will take care of same patch being in two trees.
Doesn't it only ta
On Tue, Dec 04, 2018 at 08:43:11AM -0800, David Miller wrote:
> From: Jiong Wang
> Date: Tue, 4 Dec 2018 04:56:29 -0500
>
> > This patch implements interpreting BPF_ALU | BPF_ARSH. Do arithmetic right
> > shift on low 32-bit sub-register, and zero the high 32 bits.
> >
> > Reviewed-by: Jakub Ki
From: Jiong Wang
Date: Tue, 4 Dec 2018 04:56:29 -0500
> This patch implements interpreting BPF_ALU | BPF_ARSH. Do arithmetic right
> shift on low 32-bit sub-register, and zero the high 32 bits.
>
> Reviewed-by: Jakub Kicinski
> Signed-off-by: Jiong Wang
I just want to say that this behavior
This patch implements interpreting BPF_ALU | BPF_ARSH. Do arithmetic right
shift on low 32-bit sub-register, and zero the high 32 bits.
Reviewed-by: Jakub Kicinski
Signed-off-by: Jiong Wang
---
kernel/bpf/core.c | 52 ++--
1 file changed, 30 inser
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