On Sat, May 06, 2006 at 12:42:38PM +0400, Evgeniy Polyakov ([EMAIL PROTECTED])
wrote:
> On Fri, May 05, 2006 at 05:35:33PM -0700, David S. Miller ([EMAIL PROTECTED])
> wrote:
> > From: Evgeniy Polyakov <[EMAIL PROTECTED]>
> > Date: Fri, 5 May 2006 13:36:56 +0400
> >
> > > Hardware folks could al
On Fri, May 05, 2006 at 05:35:33PM -0700, David S. Miller ([EMAIL PROTECTED])
wrote:
> From: Evgeniy Polyakov <[EMAIL PROTECTED]>
> Date: Fri, 5 May 2006 13:36:56 +0400
>
> > Hardware folks could also create it's own implementation and show
> > community if theirs approach is good or not.
>
> De
From: Evgeniy Polyakov <[EMAIL PROTECTED]>
Date: Fri, 5 May 2006 13:36:56 +0400
> Hardware folks could also create it's own implementation and show
> community if theirs approach is good or not.
Designing hardware for non-existing software infrastructure is
risky buisness :-)
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On Thu, May 04, 2006 at 04:04:32PM -0700, David S. Miller ([EMAIL PROTECTED])
wrote:
> Hardware folks are jumping the gun and it's very annoying and takes
> precious time away from thinking about and working on the
> implementation.
Hardware folks could also create it's own implementation and sho
From: Alex Aizman <[EMAIL PROTECTED]>
Date: Thu, 04 May 2006 15:49:11 -0700
> So, what are the requirements?
I will say it a 10th time, "we simply don't know yet."
Please be patient and let us design the net channel infrastructure
properly, then we can think clearly about how hardware might supp
So, what are the requirements? The hardware already parses L2, L3, L4 headers,
and for the future generation we could add to the set of already supported
steering/filtering criteria. Having some discussion on the essential vs.
optional requirements seems like the right thing at this point.
On
David S. Miller wrote:
> From: Evgeniy Polyakov <[EMAIL PROTECTED]>
> Date: Wed, 3 May 2006 22:07:40 +0400
>
>> On Wed, May 03, 2006 at 08:56:23AM -0700, Caitlin Bestler
> ([EMAIL PROTECTED]) wrote:
I'd expect high end NIC ASICs to implement rx steering based upon
some sort of hash (for
From: Evgeniy Polyakov <[EMAIL PROTECTED]>
Date: Wed, 3 May 2006 22:07:40 +0400
> On Wed, May 03, 2006 at 08:56:23AM -0700, Caitlin Bestler ([EMAIL PROTECTED])
> wrote:
> > > I'd expect high end NIC ASICs to implement rx steering based
> > > upon some sort of hash (for load balancing), as well as
From: "Leonid Grossman" <[EMAIL PROTECTED]>
Date: Wed, 3 May 2006 09:56:18 -0400
> Do you have suggestions on potential hardware assists/offloads for
> netfilter?
We don't know yet what things will look like, that's why we
shouldn't be defining APIs and I cannot give any such advice
yet.
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On Wed, 3 May 2006 11:12:15 -0700
"Caitlin Bestler" <[EMAIL PROTECTED]> wrote:
> Evgeniy Polyakov wrote:
> > On Wed, May 03, 2006 at 08:56:23AM -0700, Caitlin Bestler
> > ([EMAIL PROTECTED]) wrote:
> >>> I'd expect high end NIC ASICs to implement rx steering based upon
> >>> some sort of hash (for
In article <[EMAIL PROTECTED]> (at Wed, 3 May 2006 22:07:40 +0400), Evgeniy
Polyakov <[EMAIL PROTECTED]> says:
> > Even if the hardware cannot fully implement netfilter rules
> > there is still value in having an interface that documents
> > exactly how much filtering a given piece of hardware c
Evgeniy Polyakov wrote:
> On Wed, May 03, 2006 at 08:56:23AM -0700, Caitlin Bestler
> ([EMAIL PROTECTED]) wrote:
>>> I'd expect high end NIC ASICs to implement rx steering based upon
>>> some sort of hash (for load balancing), as well as explicit "1:1"
>>> steering between a sw channel and a hw cha
On Wed, May 03, 2006 at 08:56:23AM -0700, Caitlin Bestler ([EMAIL PROTECTED])
wrote:
> > I'd expect high end NIC ASICs to implement rx steering based
> > upon some sort of hash (for load balancing), as well as
> > explicit "1:1" steering between a sw channel and a hw
> > channel. Both options for
Are you proposing a mechanism for the consuming end of a tx
channel to support a large number of channels, or are you
assuming that the number of tx channels will be small enough
that simply polling them in priority order is adequate?
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[EMAIL PROTECTED] wrote:
>> -Original Message-
>> From: [EMAIL PROTECTED]
>> [mailto:[EMAIL PROTECTED] On Behalf Of David S. Miller
>> Sent: Tuesday, May 02, 2006 11:48 PM
>> To: [EMAIL PROTECTED]
>> Cc: [EMAIL PROTECTED]; netdev@vger.kernel.org
>
> -Original Message-
> From: [EMAIL PROTECTED]
> [mailto:[EMAIL PROTECTED] On Behalf Of David S. Miller
> Sent: Tuesday, May 02, 2006 11:48 PM
> To: [EMAIL PROTECTED]
> Cc: [EMAIL PROTECTED]; netdev@vger.kernel.org
> Subject: Re: VJ Channel API - driver level (P
I don't think we should be defining driver APIs when we haven't even
figured out how the core of it would even work yet.
A key part of this is the netfilter bits, that will require
non-trivial flow identification, a hash will simply not be enough, and
it will not be allowed to not support the net
On Tue, 02 May 2006 15:53:50 -0700
Alex Aizman <[EMAIL PROTECTED]> wrote:
> Signed-off-by: Alex Aizman <[EMAIL PROTECTED]>
>
> Hacked netdevice.h to support multiple channels.
>
> --- netdevice-orig.h 2006-03-04 10:01:38.0 -0800
> +++ netdevice-channel.h 2006-03-09 10:17:11.419955
Signed-off-by: Alex Aizman <[EMAIL PROTECTED]>
Hacked netdevice.h to support multiple channels.
--- netdevice-orig.h2006-03-04 10:01:38.0 -0800
+++ netdevice-channel.h 2006-03-09 10:17:11.419955200 -0800
@@ -246,6 +246,147 @@
extern int __init netdev_boot_setup(char *str);
+#ifdef
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