W dniu 2020-08-30 o 01:16, Andrew Lunn pisze:
I meant that with the split description of the mdio node the mdio bus for
use in the system would be selected almost automatically. Suppose that I can
do the device tree "my way":
&fec2 {
...
mdio { phy2 ... };
...
};
&fec1 {
...
mdio { phy1
> I meant that with the split description of the mdio node the mdio bus for
> use in the system would be selected almost automatically. Suppose that I can
> do the device tree "my way":
> &fec2 {
> ...
> mdio { phy2 ... };
> ...
> };
> &fec1 {
> ...
> mdio { phy1 ... };
> ...
> };
> This em
W dniu 2020-08-29 o 18:00, Andrew Lunn pisze:
This is true assuming that the PHYs are always and forever connected to one
specific MDIO bus. This is probably reasonable. Although, in i.MX the MDIO
bus of FEC1 and FEC2 shares the pins.
In general, they do not. In fact, i don't see how that can wo
> This is true assuming that the PHYs are always and forever connected to one
> specific MDIO bus. This is probably reasonable. Although, in i.MX the MDIO
> bus of FEC1 and FEC2 shares the pins.
In general, they do not. In fact, i don't see how that can work. The
FEC drive provides no mutual exclu
W dniu 2020-08-29 o 17:15, Andrew Lunn pisze:
The driver would be able to add the new PHYs to the shared MDIO bus by
calling of_mdiobus_register_children. Then the device tree looks like this,
which is more reasonable in my opinion:
&fec2 {
(...)
mdio {
(phy for fec2 here)
};
> The driver would be able to add the new PHYs to the shared MDIO bus by
> calling of_mdiobus_register_children. Then the device tree looks like this,
> which is more reasonable in my opinion:
>
> &fec2 {
> (...)
> mdio {
> (phy for fec2 here)
> };
> (...)
> };
>
> &fec1 {
> (...)
W dniu 2020-08-29 o 05:29, Florian Fainelli pisze:
On 8/28/2020 4:14 PM, Adam Rudziński wrote:
W dniu 2020-08-29 o 00:53, Andrew Lunn pisze:
On Sat, Aug 29, 2020 at 12:34:05AM +0200, Adam Rudziński wrote:
Hi Andrew.
W dniu 2020-08-29 o 00:28, Andrew Lunn pisze:
Hi Adam
If kernel has to bri
On 8/28/2020 4:14 PM, Adam Rudziński wrote:
W dniu 2020-08-29 o 00:53, Andrew Lunn pisze:
On Sat, Aug 29, 2020 at 12:34:05AM +0200, Adam Rudziński wrote:
Hi Andrew.
W dniu 2020-08-29 o 00:28, Andrew Lunn pisze:
Hi Adam
If kernel has to bring up two Ethernet interfaces, the processor
has
W dniu 2020-08-29 o 00:53, Andrew Lunn pisze:
On Sat, Aug 29, 2020 at 12:34:05AM +0200, Adam Rudziński wrote:
Hi Andrew.
W dniu 2020-08-29 o 00:28, Andrew Lunn pisze:
Hi Adam
If kernel has to bring up two Ethernet interfaces, the processor has two
peripherals with functionality of MACs (in i
On Sat, Aug 29, 2020 at 12:34:05AM +0200, Adam Rudziński wrote:
> Hi Andrew.
>
> W dniu 2020-08-29 o 00:28, Andrew Lunn pisze:
> > Hi Adam
> >
> > > If kernel has to bring up two Ethernet interfaces, the processor has two
> > > peripherals with functionality of MACs (in i.MX6ULL these are Fast
>
Hi Andrew.
W dniu 2020-08-29 o 00:28, Andrew Lunn pisze:
Hi Adam
If kernel has to bring up two Ethernet interfaces, the processor has two
peripherals with functionality of MACs (in i.MX6ULL these are Fast Ethernet
Controllers, FECs), but uses a shared MDIO bus, then the kernel first probes
one
Hi Adam
> If kernel has to bring up two Ethernet interfaces, the processor has two
> peripherals with functionality of MACs (in i.MX6ULL these are Fast Ethernet
> Controllers, FECs), but uses a shared MDIO bus, then the kernel first probes
> one MAC, enables clock for its PHY, probes MDIO bus tryn
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