Put the two poll intervals (min and max) in the driver's ops
structure. This is needed to add the xmdio support later.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 10 --
1 file changed, 8 insertions(+), 2 del
-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/Kconfig | 6 +-
drivers/net/ethernet/marvell/mvmdio.c | 101 +-
2 files changed, 101 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/marvell/Kconfig
b/d
A new compatible for Marvell xMDIO interfaces was added into the Marvell
MDIO driver. Document this new compatible.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
Documentation/devicetree/bindings/net/marvell-orion-mdio.txt | 8
1 file changed, 4 insertions
On Fri, Jun 09, 2017 at 05:03:40PM +0200, Andrew Lunn wrote:
> > There are two busses, one generating c22 transactions and one generating
> > c45 transactions. Each bus has its own MDC/MDIO pins.
>
> O.K. That is what i wanted to know. So we want two completely separate
> device tree bindings,
-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 112 +++---
1 file changed, 105 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvmdio.c
b/drivers/net/ethernet/marvell/mvmdio.c
Cosmetic patch to use the GENMASK helper for masks.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Russell King
The MDIO layer already provides per-bus locking, so there's no need for
MDIO bus drivers to do their own internal locking. Remove this.
Signed-off-by: Russell King
---
drivers/net/ethernet/marvell/mvmdio.c | 10
Cosmetic fix reordering headers alphabetically.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --g
Add a check for the read and write smi operations, to ensure the
MII_ADDR_C45 bit isn't set. This will be needed as soon as the xSMI
support is added to the mvmdio driver.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 6 +++
Add the description of the xMDIO bus for the Marvell Armada 7k and
Marvell Armada 8k; for both CP110 slave and master. This bus is found
on Marvell Ethernet controllers and provides an interface with the
xMDIO bus.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch
Introduce an ops structure to add an indirection on the is_done
function, as this is needed to add the xMDIO support later.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 30 +++---
1 file chang
Cosmetic patch replacing spaces by tabs for defined values.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 26 +-
1 file changed, 13 inser
Cosmetic patch simplifying the smi read and write error paths. It also
align their error paths with the ones of the xsmi functions.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 16 ++--
1 file changed, 6 inse
A new compatible for Marvell xMDIO interfaces was added into the Marvell
MDIO driver. Document this new compatible.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
Documentation/devicetree/bindings/net/marvell-orion-mdio.txt | 8
1 file changed, 4 insertions
.
- Added 3 Reviewed-by tags from Florian (I dropped another one as the
patch changed in v2).
Antoine Tenart (10):
net: mvmdio: reorder headers alphabetically
net: mvmdio: use tabs for defines
net: mvmdio: use GENMASK for masks
net: mvmdio: introduce an ops structure
net: mvmdio: put
Put the two poll intervals (min and max) in the driver's ops
structure. This is needed to add the xmdio support later.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
Put the two poll intervals (min and max) in the driver's ops
structure. This is needed to add the xmdio support later.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 8
Add a check for the read and write smi operations, to ensure the
MII_ADDR_C45 bit isn't set. This will be needed as soon as the xSMI
support is added to the mvmdio driver.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@
Cosmetic patch replacing spaces by tabs for defined values.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 26 +-
1 file changed, 13 inser
-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 112 +++---
1 file changed, 105 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/marvell
if the MII_ADDR_C45 bit is set.
- Removed the marvell,xmdio compatible addition.
- Fixed the is_read_valid logic.
- Updated to use static const variables for ops.
- Added 3 Reviewed-by tags from Florian (I dropped another one as the
patch changed in v2).
Antoine Tenart (10):
net: mvmdio
Cosmetic patch simplifying the smi read and write error paths. It also
align their error paths with the ones of the xsmi functions.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marv
Cosmetic fix reordering headers alphabetically.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/mvmdio.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --g
A new compatible for Marvell xMDIO interfaces was added into the Marvell
MDIO driver. Document this new compatible.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
Documentation/devicetree/bindings/net/marvell-orion-mdio.txt | 10 ++
1 file changed, 6 inse
Add the description of the xMDIO bus for the Marvell Armada 7k and
Marvell Armada 8k; for both CP110 slave and master. This bus is found
on Marvell Ethernet controllers and provides an interface with the
xMDIO bus.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
Introduce an ops structure to add an indirection on the is_done
function, as this is needed to add the xMDIO support later.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
drivers/net/ethernet/marvell/m
Hi Russell,
On Mon, Jun 12, 2017 at 11:17:39AM +0100, Russell King - ARM Linux wrote:
> On Mon, Jun 12, 2017 at 11:57:43AM +0200, Antoine Tenart wrote:
> > +static const struct orion_mdio_ops *orion_mdio_get_ops(struct
> > orio
The mvpp22_port_mii_set() function was added by 2697582144dd, but the
function directly returns without doing anything. This return was used
when debugging and wasn't removed before sending the patch. Fix this.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drive
ecksum and caused
performance degradation.
Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network
unit")
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 20 ++--
1 file change
for Marvell Armada 375 network
unit")
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet
Hi all,
This series contains various fixes for the Marvell PPv2 driver. Please
have a thorough look at patch 1/3 ("net: mvpp2: fix the dma_mask and
coherent_dma_mask settings for PPv2.2") as I'm not 100% sure about the
fix implementation.
Thanks!
Antoine
Antoine Tenart (1):
net:
tation.
This can lead to a memory remap for all dma_map_single() calls when
dealing with memory above 4GB.
Fixes: 2067e0a13cfe ("net: mvpp2: set dma mask and coherent dma mask on PPv2.2")
Reported-by: Stefan Chulski <stef...@marvell.com>
Signed-off-by: Antoine Tenart <antoine.
Remove a goto in the PPv2 tx function which jumps to the next line
anyway. This is a cosmetic commit.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/m
Hi David,
On Mon, Sep 18, 2017 at 05:18:58PM -0700, David Miller wrote:
> From: Antoine Tenart <antoine.ten...@free-electrons.com>
> Date: Mon, 18 Sep 2017 15:04:06 +0200
>
> > The dev->dma_mask usually points to dev->coherent_dma_mask. This is an
> > issue as s
.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvpp2.c | 502 +--
2 files changed, 303 insertions(+), 200 deletions(-)
diff --git a/drivers/net/ethernet/marvell/K
Hi Russell,
On Mon, Sep 25, 2017 at 11:55:14AM +0200, Antoine Tenart wrote:
> On Fri, Sep 22, 2017 at 12:07:31PM +0100, Russell King - ARM Linux wrote:
> > On Thu, Sep 21, 2017 at 03:45:22PM +0200, Antoine Tenart wrote:
>
> > > +static int mvpp2_phylink_mac_link_state(s
Hi Kishon,
On Wed, Aug 30, 2017 at 10:49:13AM +0530, Kishon Vijay Abraham I wrote:
> On Monday 28 August 2017 08:27 PM, Antoine Tenart wrote:
> > +
> > +static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
>
> the mode need not be passed a
Hi Kishon,
On Wed, Aug 30, 2017 at 11:01:56AM +0530, Kishon Vijay Abraham I wrote:
>
> I think we should just select the mode that a particular lane has been
> configured here instead of populating all the modes. But I think that doesn't
> make sense since the mode is set by the consumer and the
-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 2f05a0b0773c..9e64b1
This patch adds comphy phandles to the Ethernet ports in the mcbin
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 3 +++
1 file chan
The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY
that provides a number of shared PHYs used by various interfaces in the
SoC: network, SATA, PCIe, etc. This Device Tree binding allows to
describe this COMPHY hardware block.
Signed-off-by: Antoine Tenart <antoine.ten...@f
are supported by the comphy driver: sgmii
and 10gkr.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/phy/marvell/Kconfig | 11 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
This patch extends on both cp110 the system register area length to
include some of the comphy registers as well.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp110-slav
This patch adds more generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the SGMII and/or the 10GKR mode
by using the set_mode callback.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Acked-by: Kishon Vijay Abraham I <kis...@ti.com>
---
i
relying on the bootloader.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/et
This patch adds comphy phandles to the Ethernet ports in the 7040-db
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 1 +
1 file chan
ext/master.
Antoine Tenart (12):
phy: add sgmii and 10gkr modes to the phy_mode enum
phy: add the mvebu cp110 comphy driver
Documentation/bindings: phy: document the Marvell comphy driver
net: mvpp2: initialize the comphy
net: mvpp2: simplify the link_event function
net: mvpp2: improv
The link_event function is somewhat complicated. This cosmetic patch
simplifies it.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/net/et
itself. The queues are now stopped as well, and
the netif carrier helpers are called.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp
Raynal <miquel.ray...@free-electrons.com>
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6b26a05ae5b4..d453ba50df43 10064
Now that the comphy driver is available, this patch adds the
corresponding nodes in the cp110 master and slave device trees.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++
.../arm64/bo
for Marvell Armada 375 network
unit")
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet
port")
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index b2f99df81e9c..161
Hi all,
This series contains 3 fixes for the Marvell PPv2 driver.
Thanks!
Antoine
Since v1:
- Removed one patch about dma masks as it would need a better fix.
- Added one fix about the MAC Tx clock source selection.
Antoine Tenart (1):
net: mvpp2: do not select the internal source clock
On Mon, Sep 25, 2017 at 02:59:47PM +0200, Antoine Tenart wrote:
> From: Yan Markman <ymark...@marvell.com>
>
> The private port_list array has a list of pointers to mvpp2_port
> instances. This list is allocated given the number of ports enabled in
> the device tree, but
On Mon, Sep 25, 2017 at 02:59:46PM +0200, Antoine Tenart wrote:
> From: Stefan Chulski <stef...@marvell.com>
>
> Parsing fragmentation detection failed due to wrong configured
> parser TCAM entry's. Some traffic was marked as fragmented in RX
> descriptor, even it
ecksum and caused
performance degradation.
Fixes: 3f518509dedc ("ethernet: Add new driver for Marvell Armada 375 network
unit")
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 20 ++--
1 file change
On Mon, Sep 25, 2017 at 01:13:43PM +0100, Russell King - ARM Linux wrote:
> On Mon, Sep 25, 2017 at 01:53:03PM +0200, Antoine Tenart wrote:
> > On Mon, Sep 25, 2017 at 11:45:32AM +0100, Russell King - ARM Linux wrote:
> > > Can you describe what the GoP link IRQ is doing please?
Hi Russell,
On Fri, Sep 22, 2017 at 12:07:31PM +0100, Russell King - ARM Linux wrote:
> On Thu, Sep 21, 2017 at 03:45:22PM +0200, Antoine Tenart wrote:
> > Convert the PPv2 driver to use phylink, which models the MAC to PHY
> > link. The phylink support is made such a way the G
On Mon, Sep 25, 2017 at 11:45:32AM +0100, Russell King - ARM Linux wrote:
> On Mon, Sep 25, 2017 at 11:55:14AM +0200, Antoine Tenart wrote:
> > On Fri, Sep 22, 2017 at 12:07:31PM +0100, Russell King - ARM Linux wrote:
> > > On Thu, Sep 21, 2017 at 03:45:22PM +0200, An
On Thu, Sep 21, 2017 at 10:07:18AM -0700, David Miller wrote:
> From: Antoine Tenart <antoine.ten...@free-electrons.com>
> Date: Thu, 21 Sep 2017 16:24:13 +0200
>
> > That's also the default when the platform does not allocate dma_mask.
>
> That's the problem that
On Wed, Aug 23, 2017 at 03:24:55PM +, Stefan Chulski wrote:
> > When the cable is connected (there is signal) and the serdes is in sync and
> > AN
> > succeeded.
> >
> > > With SFF/SFP ports, you generally need a gpio line the fibre module
> > > can use to indicate if it has link. Fixed-phy
Hi Stefan,
On Thu, Aug 24, 2017 at 01:57:04PM +, Stefan Chulski wrote:
>
> > > How would you name it if not "comphy-cp110"?
> >
> > Good question...
> >
> > '7000-cpmphy-cp110'
> > '8000-cpmphy-cp110'
> >
> > ??
> >
> > Andrew
>
> A8K Marvell SoC has two South Bridge communication
Hi Andrew,
On Thu, Aug 24, 2017 at 03:58:13PM +0200, Andrew Lunn wrote:
> > @@ -189,6 +191,7 @@
> > status = "okay";
> > phy = <_phy>;
> > phy-mode = "sgmii";
> > + phys = <_comphy0 1>;
>
> Does the binding document describe the meaning of the specifier?
Ahhh no you're right! It's
Hi Andrew,
On Thu, Aug 24, 2017 at 04:56:09PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 10:38:19AM +0200, Antoine Tenart wrote:
> > This patch adds logic to reconfigure the comphy/gop when the link status
> > change at runtime. This is very useful on boards such as
Hi Andrew,
On Thu, Aug 24, 2017 at 04:06:25PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 10:38:17AM +0200, Antoine Tenart wrote:
> > @@ -5753,14 +5753,24 @@ static void mvpp2_link_event(struct net_device *dev)
> > port->link = phydev->link;
> >
Hi Andrew,
On Thu, Aug 24, 2017 at 03:39:22PM +0200, Andrew Lunn wrote:
> > +static const struct mvebu_comhy_conf mvebu_comphy_modes[] = {
> > + /* lane 0 */
> > + MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
> > + /* lane 1 */
> > + MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
> > +
Hi Andrew,
On Thu, Aug 24, 2017 at 03:45:04PM +0200, Andrew Lunn wrote:
> > + for_each_available_child_of_node(pdev->dev.of_node, child) {
> > + struct mvebu_comphy_lane *lane;
> > + struct phy *phy;
> > + int ret;
> > + u32 val;
> > +
> > + ret
Hi Marcin,
On Wed, Aug 23, 2017 at 11:05:33PM +0200, Marcin Wojtas wrote:
> 2017-08-23 18:04 GMT+02:00 Antoine Tenart <antoine.ten...@free-electrons.com>:
> > On Wed, Aug 23, 2017 at 03:24:55PM +, Stefan Chulski wrote:
> >> > When the cable is connected (ther
Hi Andrew,
On Thu, Aug 24, 2017 at 03:19:38PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 10:38:11AM +0200, Antoine Tenart wrote:
> > This patch adds more PHY modes to the phy_mode enum, to allow
> > configuring PHYs to the SGMII and/or the 10GKR mode by using the
> &
On Thu, Aug 24, 2017 at 05:08:29PM +, Stefan Chulski wrote:
> > > Imagine phylib is using the copper Ethernet PHY, but the MAC is using
> > > the SFP port. Somebody pulls out the copper cable, phylib says the
> > > link is down, turns the carrier off and calls the callback. Not good,
> > >
On Thu, Aug 24, 2017 at 06:04:01PM +0100, Russell King - ARM Linux wrote:
> On Thu, Aug 24, 2017 at 06:57:43PM +0200, Andrew Lunn wrote:
> > > I see what could be the issue but I do not understand one aspect though:
> > > how could we switch from one PHY to another, as there's only one output
> >
On Thu, Aug 24, 2017 at 06:01:24PM +0200, Andrew Lunn wrote:
> On Thu, Aug 24, 2017 at 05:52:41PM +0200, Antoine Tenart wrote:
> > On Thu, Aug 24, 2017 at 04:56:09PM +0200, Andrew Lunn wrote:
> > > On Thu, Aug 24, 2017 at 10:38:19AM +0200, Antoine Tenart wrote:
> > &
Hi Russell,
On Fri, Aug 25, 2017 at 11:43:13PM +0100, Russell King - ARM Linux wrote:
> On Fri, Aug 25, 2017 at 04:48:12PM +0200, Antoine Tenart wrote:
> > The link mode (speed, duplex) was forced based on what the phylib
> > returns. This should not be the case, and only fo
Hi Russell,
On Fri, Aug 25, 2017 at 11:46:16PM +0100, Russell King - ARM Linux wrote:
> On Fri, Aug 25, 2017 at 04:48:16PM +0200, Antoine Tenart wrote:
> > This patch adds logic to reconfigure the comphy/gop when the link status
> > change at runtime. This is very u
On Mon, Aug 28, 2017 at 09:51:52AM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 28, 2017 at 10:38:37AM +0200, Marcin Wojtas wrote:
> >
> > Can you be 100% sure that when using SGMII with PHY's (like Marvell
> > Alaska 88E1xxx series), is in-band link information always available?
> > I'd
On Mon, Aug 28, 2017 at 12:06:24PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 28, 2017 at 11:40:51AM +0200, Antoine Tenart wrote:
> > On Mon, Aug 28, 2017 at 09:51:52AM +0100, Russell King - ARM Linux wrote:
> > > On Mon, Aug 28, 2017 at 10:38:37AM +0200, M
ed the PHY cell argument in the dt documentation.
- New patch adding comphy phandles for the 7040-db board.
- Checked if the carrier_on/off functions were needed. They are.
- s/PHY/generic PHY/ in commit log of patch 1.
- Rebased on the latest net-next/master.
Antoine Tenart (12):
phy:
This patch extends on both cp110 the system register area length to
include some of the comphy registers as well.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp110-slav
relying on the bootloader.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/et
The link_event function is somewhat complicated. This cosmetic patch
simplifies it.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/net/et
This patch adds comphy phandles to the Ethernet ports in the 7040-db
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 1 +
1 file chan
itself. The queues are now stopped as well, and
the netif carrier helpers are called.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp
are supported by the comphy driver: sgmii
and 10gkr.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY
that provides a number of shared PHYs used by various interfaces in the
SoC: network, SATA, PCIe, etc. This Device Tree binding allows to
describe this COMPHY hardware block.
Signed-off-by: Antoine Tenart <antoine.ten...@f
-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 2f05a0b0773c..9e64b1
Now that the comphy driver is available, this patch adds the
corresponding nodes in the cp110 master and slave device trees.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++
.../arm64/bo
This patch adds more generic PHY modes to the phy_mode enum, to
allow configuring generic PHYs to the SGMII and/or the 10GKR mode
by using the set_mode callback.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
include/linux/phy/phy.h | 2 ++
1 file changed, 2 inse
When using the XLG MAC, it does not make sense to force the GMAC autoneg
parameters. This patch adds checks to only set the GMAC autoneg
parameters when needed (i.e. when not using the XLG MAC).
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/m
Raynal <miquel.ray...@free-electrons.com>
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6b26a05ae5b4..d453ba50df43 10064
This patch adds comphy phandles to the Ethernet ports in the mcbin
device tree. The comphy is used to configure the serdes PHYs used by
these ports.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 3 +++
1 file chan
are supported by the comphy driver: sgmii
and 10gkr.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
Now that the comphy driver is available, this patch adds the
corresponding nodes in the cp110 master and slave device trees.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++
.../arm64/bo
The link mode (speed, duplex) was forced based on what the phylib
returns. This should not be the case, and only forced by ethtool
functions manually. This patch removes the link mode enforcement from
the phylib link_event callback.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.
The link_event function is somewhat complicated. This cosmetic patch
simplifies it.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/net/et
This patch adds an extra check when the link_event function is called,
so that it won't do anything when the netif isn't running.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 3 +++
1 file changed, 3 insertions(+)
diff
relying on the bootloader.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/et
This patch extends on both cp110 the system register area length to
include some of the comphy registers as well.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp110-slav
itself. The queues are now stopped as well, and
the netif carrier helpers are called.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp
.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index e9fd4f
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