"H.J. Lu" writes:
> You need to write a run-time test in configure.ac to check if CET is enabled
> since CET requires processor, kernel and user space support.
Do you think a test like this would be feasible? It needs both compile
time and run time checks:
1. Check (preprocessor) if building
Simo Sorce writes:
> On Thu, 2020-03-12 at 21:53 +0100, Niels Möller wrote:
>> But I'm a bit confused by the use of ASM_X86_ENDBR. The instruction is
>> added to entry points, via the PROLOGUE macro, but not to other branch
>> targets, e.g., loop labels in the assembly files. Is that not needed
On Thu, 2020-03-12 at 21:53 +0100, Niels Möller wrote:
> "H.J. Lu" writes:
>
> > Here is the updated patch.
>
> This V3 patch looks pretty nice to me.
>
> But I'm a bit confused by the use of ASM_X86_ENDBR. The instruction is
> added to entry points, via the PROLOGUE macro, but not to other
"H.J. Lu" writes:
> Here is the updated patch.
This V3 patch looks pretty nice to me.
But I'm a bit confused by the use of ASM_X86_ENDBR. The instruction is
added to entry points, via the PROLOGUE macro, but not to other branch
targets, e.g., loop labels in the assembly files. Is that not
On Mon, 2020-03-09 at 14:59 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 2:42 PM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 14:31 -0700, H.J. Lu wrote:
> > > On Mon, Mar 9, 2020 at 2:15 PM Simo Sorce wrote:
> > > > On Mon, 2020-03-09 at 12:46 -0700, H.J. Lu wrote:
> > > > > On Mon, Mar 9,
On Mon, 2020-03-09 at 14:31 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 2:15 PM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 12:46 -0700, H.J. Lu wrote:
> > > On Mon, Mar 9, 2020 at 12:22 PM Simo Sorce wrote:
> > > > On Mon, 2020-03-09 at 15:19 -0400, Simo Sorce wrote:
> > > > > On Mon,
On Mon, 2020-03-09 at 12:46 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 12:22 PM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 15:19 -0400, Simo Sorce wrote:
> > > On Mon, 2020-03-09 at 11:56 -0700, H.J. Lu wrote:
> > > > On Mon, Mar 9, 2020 at 11:19 AM Simo Sorce wrote:
> > > > > On Mon,
On Mon, 2020-03-09 at 15:19 -0400, Simo Sorce wrote:
> On Mon, 2020-03-09 at 11:56 -0700, H.J. Lu wrote:
> > On Mon, Mar 9, 2020 at 11:19 AM Simo Sorce wrote:
> > > On Mon, 2020-03-09 at 19:03 +0100, Niels Möller wrote:
> > > > Simo Sorce writes:
> > > >
> > > > > The patchset i solder than I
On Mon, 2020-03-09 at 11:56 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 11:19 AM Simo Sorce wrote:
> > On Mon, 2020-03-09 at 19:03 +0100, Niels Möller wrote:
> > > Simo Sorce writes:
> > >
> > > > The patchset i solder than I did remember, April 2019
> > > > But I recall running at least one
On Mon, 2020-03-09 at 19:03 +0100, Niels Möller wrote:
> Simo Sorce writes:
>
> > The patchset i solder than I did remember, April 2019
> > But I recall running at least one version of it on our CET emulator @
> > Red Hat.
>
> Sorry I forgot to followup on that. It seems only the first easy
Simo Sorce writes:
> The patchset i solder than I did remember, April 2019
> But I recall running at least one version of it on our CET emulator @
> Red Hat.
Sorry I forgot to followup on that. It seems only the first easy cleanup
patch, "Add missing EPILOGUEs in assembly files", was applied
On Mon, 2020-03-09 at 08:33 -0700, H.J. Lu wrote:
> On Mon, Mar 9, 2020 at 5:36 AM Simo Sorce wrote:
> > On Sat, 2020-03-07 at 17:49 +0100, Niels Möller wrote:
> > > "H.J. Lu" writes:
> > >
> > > > Intel Control-flow Enforcement Technology (CET):
> > > >
> > > >
On Sat, 2020-03-07 at 17:49 +0100, Niels Möller wrote:
> "H.J. Lu" writes:
>
> > Intel Control-flow Enforcement Technology (CET):
> >
> > https://software.intel.com/en-us/articles/intel-sdm
> >
> > contains shadow stack (SHSTK) and indirect branch tracking (IBT). When
> > CET is enabled, ELF
On Sat, Mar 7, 2020 at 12:29 PM Jeffrey Walton wrote:
>
> On Sat, Mar 7, 2020 at 11:49 AM Niels Möller wrote:
> >
> > "H.J. Lu" writes:
> >
> > > Intel Control-flow Enforcement Technology (CET):
> > >
> > > https://software.intel.com/en-us/articles/intel-sdm
> > >
> > > contains shadow stack
On Sat, Mar 7, 2020 at 11:49 AM Niels Möller wrote:
>
> "H.J. Lu" writes:
>
> > Intel Control-flow Enforcement Technology (CET):
> >
> > https://software.intel.com/en-us/articles/intel-sdm
> >
> > contains shadow stack (SHSTK) and indirect branch tracking (IBT). When
> > CET is enabled, ELF
"H.J. Lu" writes:
> Intel Control-flow Enforcement Technology (CET):
>
> https://software.intel.com/en-us/articles/intel-sdm
>
> contains shadow stack (SHSTK) and indirect branch tracking (IBT). When
> CET is enabled, ELF object files must be marked with .note.gnu.property
> section. Also when
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