Oh sorry I did not see this email and the previous before sending my
new patches.
About git, generally git am wants to be applied in order, but I think
there may be a fuzz option to git too, never really investigated as I
usually apply all patches to a branch (or pull that branch directly
from PR
cat >conftest.s << EOF
+.text
+EOF
+ FLAG="-Wa,--generate-missing-build-notes=yes"
+ nettle_assemble="$CC $CFLAGS $CPPFLAGS -c conftest.s $FLAG >conftest.out 2>&1"
+ if AC_TRY_EVAL(nettle_assemble); then
+nettle_cv_asm_build_notes=ye
Simo Sorce writes:
> Ok attached find new patches,
> they address all concerns except for adding the CET_SECTION macro
> automagically to all asm files.
Ah, one more thing:
> +define(,
> + +<.pushsection .note.gnu.property,"a"
How portable is .pushsection? If we ensure that notes are last, pla
Simo Sorce writes:
> they address all concerns except for adding the CET_SECTION macro
> automagically to all asm files.
Thanks. I commented on that issue in my other mail.
> I also added a patch to deal with the missing epilogues.
Applied now.
BTW are there any git experts here? I often appl
Simo Sorce writes:
> I understand this is not a high bar, and I will fold the segment note
> in if you think that is what we should do, but I wanted to make you
> aware of why I did not do the same as what we do with the stack note.
I think we should aim to make all files "cet-compliant" if we d
8c41a89ed3ef913bc8a12f8e6d21edf3627007ee Mon Sep 17 00:00:00 2001
From: Simo Sorce
Date: Tue, 23 Apr 2019 18:03:35 -0400
Subject: [PATCH 1/3] Add Intel CET protection support
In upcoming processors Intel will make available Control-Flow
Enforcement Technology, which is comprised of two hardware
countermeasures against Return-Oriented
1
>
> have you seen any others?
No, those are pretty much the places where I noticed it.
Would you want an additional patch that adds those EPILOGUES ?
> Some minor comments below.
>
> > From de1b9bfeb4f8ad9a6bf8608c4b8c727dba315982 Mon Sep 17 00:00:00 2001
> > From: Si
comments below.
> From de1b9bfeb4f8ad9a6bf8608c4b8c727dba315982 Mon Sep 17 00:00:00 2001
> From: Simo Sorce
> Date: Tue, 23 Apr 2019 18:03:35 -0400
> Subject: [PATCH 1/2] Add Intel CET protection support
>
> In upcoming processors Intel will make available Control-Flow
> Enf
o Sorce
Sr. Principal Software Engineer
Red Hat, Inc
From de1b9bfeb4f8ad9a6bf8608c4b8c727dba315982 Mon Sep 17 00:00:00 2001
From: Simo Sorce
Date: Tue, 23 Apr 2019 18:03:35 -0400
Subject: [PATCH 1/2] Add Intel CET protection support
In upcoming processors Intel will make available Control-Flow
E
