https://bugs.freedesktop.org/show_bug.cgi?id=87715
--- Comment #8 from Bruno Wolff br...@wolff.to ---
Does
http://cgit.freedesktop.org/mesa/drm/commit/?id=d7c0a08bc576deb07df6c3f91f393ca8edd0c4bf
(modetest: Allocate dumb buffers with the correct bpp) look like a change that
might help me? (i.e.
A while ago, Ben Skeggs asked for some better documentation on EVO.
Sorry it took a while, but here are the EVO class header files for NV50
through GM204:
ftp://download.nvidia.com/open-gpu-doc/Display-Class-Methods/1/
These header files define the method interface to the various EVO
Restore the nv50 cursor bo on resume, and load the lut in
nv50_display_display_init
so it gets set on resume too.
Tested on a fermi and a curie.
Signed-off-by: Maarten Lankhorst maarten.lankho...@ubuntu.com
---
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
V2: clarify code, commit msgs, add comments. Drop code to was supposed to
make register assignment prefer SDST == SRC2 (patch 2) for now, because it
didn't quite do what I intended.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
Add a specific optimisation pass for NV50 to check whether SRC0 or SRC1 is
a MOV dst, IMM. If so: fold the IMM in and try to drop the MOV. Must be
done post-RA because it requires that SDST == SSRC2.
V2: improve readability and add comments to clarify decisions
Signed-off-by: Roy Spliet
Add emission rules for negative and saturate flags for MAD 4-byte opcodes,
and get rid of constraints. Short MAD has a very specific SDST == SSRC2
requirement, and since MAD IMM is short notation + 4-byte immediate, don't
have the compiler create MAD IMM instructions yet.
V2: Document MAD as
On Tue, Jan 13, 2015 at 3:35 PM, Roy Spliet rspl...@eclipso.eu wrote:
Add a specific optimisation pass for NV50 to check whether SRC0 or SRC1 is
a MOV dst, IMM. If so: fold the IMM in and try to drop the MOV. Must be
done post-RA because it requires that SDST == SSRC2.
V2: improve readability
