On 01.06.2016 20:44, poma wrote:
> On 01.06.2016 20:20, Yury Tarasievich wrote:
>> Thank you!
>>
>> Now, I'd appreciate some hints on how to make
>> console work, at least.
>> How are the video modes controlled, e.g., can I
>> have some analogue of /etc/fb.modes for nouveau?
>>
>> -Yury
>>
>
>
Hey guys,
Let me reformulate my question:
The nouveau.ko (2015-12-16) calculates and tries
to set wrong 'modelines' for my G98 hardware for
the most of video modes in console; even 640x480
gets weird vertical refresh 68Hz.
Can it be fixed at all?
Can the correct modelines be supplied to
no
On 01.06.2016 20:20, Yury Tarasievich wrote:
> Thank you!
>
> Now, I'd appreciate some hints on how to make
> console work, at least.
> How are the video modes controlled, e.g., can I
> have some analogue of /etc/fb.modes for nouveau?
>
> -Yury
>
After hand-over:
"fb: switching to nouveaufb
Thank you!
Now, I'd appreciate some hints on how to make
console work, at least.
How are the video modes controlled, e.g., can I
have some analogue of /etc/fb.modes for nouveau?
-Yury
On 01/06/16 20:38, poma wrote:
On 01.06.2016 13:48, Yury Tarasievich wrote:
...
1) Console does not initi
ary
> device
> [7.410533] nouveau :02:00.0: devinit:
> unable to compute acceptable pll values
> [7.410535] nouveau :02:00.0: devinit:
> failed pll calculation
> [7.470351] nouveau :02:00.0: fb0:
> nouveaufb frame buffer device
> [7.477047] [drm]
On Wed, Jun 01, 2016 at 06:51:51PM +0200, Peter Wu wrote:
> On Tue, May 31, 2016 at 02:20:26PM +0200, Lukas Wunner wrote:
> > On Mon, May 30, 2016 at 06:13:51PM +0200, Peter Wu wrote:
> > > Do you have any suggestions for the case where the pcieport driver
> > > refuses to put the bridge in D3 (bec
On Wed, Jun 01, 2016 at 12:28:47PM +0300, Mika Westerberg wrote:
> On Tue, May 31, 2016 at 01:02:31PM +0200, Peter Wu wrote:
> > On Tue, May 31, 2016 at 11:43:56AM +0300, Mika Westerberg wrote:
> > > On Mon, May 30, 2016 at 06:13:51PM +0200, Peter Wu wrote:
> > > > Do you have any suggestions for t
On Tue, May 31, 2016 at 02:20:26PM +0200, Lukas Wunner wrote:
> On Mon, May 30, 2016 at 06:13:51PM +0200, Peter Wu wrote:
> > Do you have any suggestions for the case where the pcieport driver
> > refuses to put the bridge in D3 (because the BIOS is too old)? In that
> > case the nouveau driver nee
On Wed, Jun 01, 2016 at 02:36:41PM +0200, Lukas Wunner wrote:
> On Wed, May 25, 2016 at 03:43:42PM +0200, Daniel Vetter wrote:
> > On Wed, May 25, 2016 at 12:51 PM, Lukas Wunner wrote:
> > > On Tue, May 24, 2016 at 11:30:42PM +0200, Daniel Vetter wrote:
> > >> On Tue, May 24, 2016 at 06:03:27PM +0
On Wed, May 25, 2016 at 03:43:42PM +0200, Daniel Vetter wrote:
> On Wed, May 25, 2016 at 12:51 PM, Lukas Wunner wrote:
> > On Tue, May 24, 2016 at 11:30:42PM +0200, Daniel Vetter wrote:
> >> On Tue, May 24, 2016 at 06:03:27PM +0200, Lukas Wunner wrote:
> >> > When a drm_crtc structure is destroyed
https://bugs.freedesktop.org/show_bug.cgi?id=96307
Bug ID: 96307
Summary: Kernel 4.7-rc1 oops when starting X
Product: xorg
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: norma
I'm trying to put to work the nouveau driver on
slackware 64 bits current, kernel 4.4.*.
I've thought the hardware to be some obscure OEM
variant of GT610. However, kind soul on IRC
pointed out that it's a G98 really, 'GeForce
9300 GS or 8400 GS'.
Proprietary NVIDIA drivers:
* 340.96 instal
https://bugs.freedesktop.org/show_bug.cgi?id=96306
Bug ID: 96306
Summary: BUG: KASAN: slab-out-of-bounds in OUT_RINGp (via
nvc0_fbcon_imageblit)
Product: xorg
Version: unspecified
Hardware: x86-64 (AMD64)
OS
https://bugs.freedesktop.org/show_bug.cgi?id=90626
Roy changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=95054
--- Comment #7 from René Krell ---
Just for the record:
- Setting Hybrid Graphic to Disabled doesn't work around this problem.
- The native nvidia driver 364.19 works fine for me.
--
You are receiving this mail because:
You are the assignee for
On Tue, May 31, 2016 at 01:02:31PM +0200, Peter Wu wrote:
> On Tue, May 31, 2016 at 11:43:56AM +0300, Mika Westerberg wrote:
> > On Mon, May 30, 2016 at 06:13:51PM +0200, Peter Wu wrote:
> > > Do you have any suggestions for the case where the pcieport driver
> > > refuses to put the bridge in D3 (
https://bugs.freedesktop.org/show_bug.cgi?id=95054
--- Comment #6 from René Krell ---
Created attachment 124228
--> https://bugs.freedesktop.org/attachment.cgi?id=124228&action=edit
Output of dmesg on HP ZBook 15 G2
--
You are receiving this mail because:
You are the assignee for the bug.
https://bugs.freedesktop.org/show_bug.cgi?id=95054
--- Comment #5 from René Krell ---
Created attachment 124227
--> https://bugs.freedesktop.org/attachment.cgi?id=124227&action=edit
/var/log/messages from OS start to crash on HP ZBook 15 G2
--
You are receiving this mail because:
You are the
https://bugs.freedesktop.org/show_bug.cgi?id=90626
--- Comment #52 from René Krell ---
Just for the record: I'm now affected by
https://bugs.freedesktop.org/show_bug.cgi?id=95054 on the same hardware (HP
ZBook 15 G2). nouveau is freezing in accelerating Plasma 5 Desktop after a
while.
--
You ar
https://bugs.freedesktop.org/show_bug.cgi?id=95054
--- Comment #4 from René Krell ---
I'm affected by the same problem on a different hardware.
/var/log/messages:
---
2016-06-01T10:31:51.921964+02:00 rkrell kernel: [ 249.913240] nouveau
:01:00.0: gr: TRAP ch 2 [003fbfa000 X[2532]]
2016-06-0
Split the MNP programming function into two functions for the cases
where we allow sliding or not, instead of making it take a parameter for
this. This results in less conditionals in the code and makes it easier
to read.
Also make the MNP programming functions take the PLL parameters as
arguments
This patch adds support for advanced features supported by the
Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be
updated without disabling the PLL first if the SYNC_MODE bit of the CFG
register is set.
More significantly, DFS allows the PLL to monitor the actual input
voltage
Use a dedicated function instead of always calculating n_lo on the fly.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/clk/gk20a.c
b/drm/nouveau/nvkm/subdev
Make functions manipulating PLL settings take them as an argument,
instead of assuming we want to work on the copy in the gk20a_clk
structure. This makes these functions more flexible, which we will need
in GM20B.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 51
Strip the _ prefix off the gk20a clock constructor.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 4 ++--
drm/nouveau/nvkm/subdev/clk/gk20a.h | 2 +-
drm/nouveau/nvkm/subdev/clk/gm20b.c | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drm/nouv
Give a name to this constant so we at least get an idea of what it is
for.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/volt/gk20a.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drm/nouveau/nvkm/subdev/volt/gk20a.c
b/drm/nouveau/nvkm/subdev/volt/gk20a.c
Move variables declarations to their actual scope of use, and simplify
code a bit.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/clk/gk20a.c
b/drm/nouveau/nvkm/su
Strip the _ prefix off the gk20a volt constructor.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/volt/gk20a.c | 10 +-
drm/nouveau/nvkm/subdev/volt/gk20a.h | 6 +++---
drm/nouveau/nvkm/subdev/volt/gm20b.c | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff
Slide setup needs to be performed only once, during init. Also
use the proper parameters for different clock speeds.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 46 -
drm/nouveau/nvkm/subdev/clk/gk20a.h | 2 ++
drm/nouveau/nvkm/
Add relevant functions to work with the gk20a_pll structure and use them
where they ought to be instead of directly manipulating registers.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 35 ++-
1 file changed, 22 insertions(+), 13 dele
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 26 ++
1 file changed, 10 insertions(+), 16 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/clk/gk20a.c
b/drm/nouveau/nvkm/subdev/clk/gk20a.c
index 4b9e7ec11412..f07cf5b44fc6 100644
--- a/drm/no
Chips may be characterized for a minimum voltage. Support this extra
parameter and select the appropriate minimum voltage for the detected
GPU speedo.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/volt/gk20a.c | 10 +-
drm/nouveau/nvkm/subdev/volt/gk20a.h | 2 +-
drm/nouv
The GPU speedo ID is required to select the right clk/volt parameters on
GM20B.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/include/nvkm/core/tegra.h | 1 +
drm/nouveau/nvkm/engine/device/tegra.c | 1 +
lib/include/nvif/os.h | 1 +
3 files changed, 3 insertions(+)
diff --
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/clk/gk20a.c | 2 +-
drm/nouveau/nvkm/subdev/clk/gm20b.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/clk/gk20a.c
b/drm/nouveau/nvkm/subdev/clk/gk20a.c
index 5f0ee24e31b8..d633669b52dc 1
Nobody else is using these, so make them private.
Signed-off-by: Alexandre Courbot
---
drm/nouveau/nvkm/subdev/volt/gk20a.c | 8
drm/nouveau/nvkm/subdev/volt/gk20a.h | 5 -
2 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/volt/gk20a.c
b/drm/nou
This series adds support for GM20B PLL's Maxwell features, namely glitchless
switch and (more importantly) DFS support. DFS lets the PLL lower its output
speed according to input current variations, making the clock more stable and
allowing it to run safely at lower voltage.
All GM20B additions ar
https://bugs.freedesktop.org/show_bug.cgi?id=90626
--- Comment #51 from René Krell ---
I was also able to reactivate nouveau on a HP ZBook 15 G2, OpenSUSE Tumbleweed
20160530, kernel 4.5.4-1-default and start X and KDE Plasma 5 on it. The patch
seems to work fine.
There are some different issues
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