*Design Engineer* *Location: Malta, NY*
*Duration : 12+ Months* *Send Resumes at vina...@idctechnologies.com <vina...@idctechnologies.com>* Please find the below requirement for Chip Design, ASIC Design and well versed in EDA tools. Request you to please provide the profiles of visa ready profiles. This is for long term opportunity. Below is the JD of the requirement. • At least 7 years of experience on chip design, including microprocessor and ASIC design flow • At least 2 years of experience in designing, validating and releasing IP (HW and SW) • Expertise in EDA tools for chip design, CPU/ASIC design and software development tools (release management, issue tracking) • Familiarity with end-to-end business flows for ASIC and RF/SF (from RFQ to Tape Out) • Ability to quickly grasp and assess impact of change in design process to ASIC development operations • A good working knowledge of EDA licensing models Warm Regards, Vinayak Ram IDC Technologies Inc 1851 McCarthy Blvd, Milpitas, CA 95035 Work: 408-470-3749 Mailto: vina...@idctechnologies.com Website: www.idctechnologies.com -- You received this message because you are subscribed to the Google Groups "Open Source Erp & Crm" group. To unsubscribe from this group and stop receiving emails from it, send an email to open-source-erp-crm+unsubscr...@googlegroups.com. To post to this group, send email to open-source-erp-crm@googlegroups.com. Visit this group at http://groups.google.com/group/open-source-erp-crm. For more options, visit https://groups.google.com/d/optout.
