Hi,
I was looking at the doxygen on the projects site and I noticed something.
http://openocd.sourceforge.net/doc/doxygen/html/tasks.html#thelist
"Serial Wire Debug
implement Serial Wire Debug interface"
Isn't that done?
-Evan
---
Hi, all,
I checked recently the SWD support progress in OpenOCD, and found that the
necessary code is already OK.
And even found that the versaloon driver already support the SWD adaptor.
And I do some test on CorteM chips, works good, except a bit slow compared to
my original code for SWD.
So I
To be fair there is a kernel module that must be needed some where but
odds are high that the users will already have that.
On Wed, Aug 6, 2014 at 3:02 PM, Andreas Fritiofson
wrote:
>
> On Wed, Aug 6, 2014 at 7:58 PM, Tim Wescott wrote:
>>
>> On Wed, 2014-08-06 at 19:28 +0200, Andreas Fritiofson
Hi,
On Thu, Sep 04, 2014 at 12:01:57PM +0200, Tomas Vanek wrote:
> Thank you for a good and useful freeware project.
Not only freeware but also Free Software.
> I'm working on support for Cypress PSoC 4. These chips have Cortex M0 CPU
> and SWD debugging interface, so OpenOCD almost works.
Soun
Hello developers,
Thank you for a good and useful freeware project.
I'm working on support for Cypress PSoC 4. These chips have Cortex M0 CPU
and SWD debugging interface, so OpenOCD almost works.
PSoC 4 flash programming is managed by system ROM routines calls.
I wrote a flash driver for it. It
hi all:
2014-09-04 16:40 GMT+08:00 vichy :
> hi all:
> I have some question about cortex_a_read_apb_ab_memory in cortex_a.c
> From spec,
> "A write to the DBGITR does not trigger an instruction for execution.
> Instead, the debug logic latches the
> instruction written to DBGITR, and retains this
hi all:
I have some question about cortex_a_read_apb_ab_memory in cortex_a.c
>From spec,
"A write to the DBGITR does not trigger an instruction for execution.
Instead, the debug logic latches the
instruction written to DBGITR, and retains this value until either a
new value is written to DBGITR, or
