I also updated to commit #133dd9 and confirmed the same behavior as before.
Attaching a new log in case it's helpful. I see a few differences between our
logs, none of which seem particularly glaring, but maybe one of them could
cause issues?
1. your clock speed is 100KHz, mine is 5MHz
2. you
Hello,
In case it's helpful, I'm attaching an OpenOCD level 3 debug log for an Xtensa
connected via JLink over JTAG to a DAP with the XDM on an AP-APB behind the
DAP. My command line is in the log file. I added your ddr_test() function and
called it, and it displays the expected values. No p
Hi,
From your 1.png, it looks like you’re calling mem_ap_init(), perhaps just as an
experiment? I believe your working XOCD case configures the DAP AP as an
APB-AP for accessing XDM; using MEM-AP is not recommended; please see the
Xtensa Debug Guide, section 7.7.4, "ap-sel" parameter.
Also,
Hi,
Looking through your log, I see similar corruptions with DSR. Bit 30 is a
reserved bit and should always be 0. The top nibble should always be 0x8, but
your log shows it is sometimes as 0x8 and sometimes as 0xc:
Debug: 63059 35535 xtensa.c:2094 xtensa_poll(): [plmp.smcu] DSR has changed:
Sent: Saturday, August 20, 2022 12:27 PM
To: Ian Thompson ; Erhan Kurubas
Cc: OpenOCD
Subject: Re: Build error: target: add generic Xtensa LX support
EXTERNAL MAIL
Plus 5 new clang warnings
https://build.openocd.org/job/openocd-clang/1106/<https://urldefense.com/v3/__https:/build.openocd.org/jo
ent: Tuesday, April 26, 2022 5:17 AM
To: Ian Thompson
Cc: openocd-devel@lists.sourceforge.net
Subject: Re: OpenOCD target support for Xtensa processors
EXTERNAL MAIL
Hi Ian,
For me, 2 hardware breakpoints in ESP32 are the most irritating thing. It makes
debugging annoying and time-consuming.
Rega
y
to ultimately provide a solution that supports all Xtensa users, and would
welcome any input/suggestions on how to best achieve this.
Thanks and regards,
Ian Thompson
[CadenceLogoRed185Regcopy1583174817new51584636989.png]<https://www.cadence.com/en_US/home.html>
Ian Thompson
Sr Principal Desi
Hello,
Does OpenOCD support memory-mapped transport? For instance, if one wanted to
run OpenOCD on an embedded ARM core (running Linux), and use it to debug
another core accessible through an APB bus mapped via PCIe, what sort of
adapter would be best to use/extend? Is there already support f
