Hello Matthias,
There is a lot of patches with topic:reset :)
https://review.openocd.org/q/topic:reset+status:open
They all should be rebased?
Or I can try only with patches for aarch64?
29.01.22 00:04, Matthias Welwarsky пише:
Antonio, Oleh, Tarek
there's a patch series in my outgoing queue
Antonio, Oleh, Tarek
there's a patch series in my outgoing queue for quite a while that contain
fixes for aarch64 and reset-halt. Maybe you want to check if any of these are
still applicable. They're quite old, not easy to rebase, I'm afraid.
Unfortunately I have no access to ARMv8 targets at t
Hello Antonio,
Thank you for your reply.
21.01.22 16:48, Antonio Borneo пише:
But as you report after the commit
6c0151623cb09da6a80655cedf568db927ae2d93 there is something weird.
First of all, please try with the additional parameter
"srst_gates_jtag" to command "reset_config".
It should be th
Hi Oleh,
Thanks for reporting the issue.
The old code, before commit 6c0151623cb09da6a80655cedf568db927ae2d93,
was simply sending the reset pulse, then halting the target.
But actually halting it randomly, somewhere during the target's boot
process. No guarantee to halt it at the very first instr
Hello Christian,
I've found that this commit 6c0151623cb09da6a80655cedf568db927ae2d93 breaks
`reset halt` for my aarch64.
Here is there log before this patch:
Open On-Chip Debugger
> reset halt
JTAG tap: soc.cpu tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd), part:
0xba00, ver: 0x5)
Debug
