No worry's mate!
Ferdinand
Pieter Conradie wrote:
>
> Hi Gary and Ferdinand,
>
>
>
> Mea Culpa. I broke the jtag_ntrst_delay in target/at91sam9260.cfg. It
> worked fine on my target board and the AT91SAM9260-EK. There is
> something funny with the target reset timing of the different Atmel
>
Hi Gary and Ferdinand,
Mea Culpa. I broke the jtag_ntrst_delay in target/at91sam9260.cfg. It worked
fine on my target board and the AT91SAM9260-EK. There is something funny with
the target reset timing of the different Atmel AT91SAM9xx targets and
jtag_ntrst_delay/jtag_nsrst_delay, but I have n
On Tue, Aug 25, 2009 at 3:39 PM, Gary Carlson wrote:
>
> I am still working through some remaining issues with the "reset init"
> command, but at this point I am inclined to believe those are related to
> configuration issues with the at91sam9g20 processor I am using rather then
> software bugs in
Hi Ferdinand,
That is indeed what was causing the problem.
I didn't notice a change had been made to that particular configuration
file. Those files rarely evolve and given that the modification was so
subtle, I completely missed it.
I am still working through some remaining issues with the "re
Committed.
Thanks!
--
Øyvind Harboe
Embedded software and hardware consulting services
http://www.zylin.com
___
Openocd-development mailing list
Openocd-development@lists.berlios.de
https://lists.berlios.de/mailman/listinfo/openocd-development
Hi Gary,
You are right, it is broken. I compiled a couple of older versions to
see when it broke. Revision 2600 was working correctly, rev. 2604 did
not work correctly. So I looked was has been changed and found that the
target/at91sam9260.cfg was changed. While playing around with this file,
Hi Gary,
I was a little bit conservative with the frequency. The following quote
is taken from the datasheet of the AT91SAM9260:
"Note the maximum JTAG clock rate on ARM926EJ-S cores is 1/6th the clock
of the CPU. This gives 5.45 kHz maximum initial JTAG clock rate for an
ARM9E running from th
Hi Gary,
I think the 8 kHz is the problem here. I have read somewhere that the
CPU speed must be 16 times faster than the jtag speed for reliable
operation.
This means that with a 32 kHz clock, the jtag speed must be 2 kHz, or
lower. I have tried myself and it seems to work correctly at 4 kHz a
Ferdinand,
Using two patches, (yours + mine) I have "reset halt" and "reset run"
working reliably for the jlink dongle. While "reset init" works sometimes I
am finding the command can cause the jlink dongle to permanently lose
communication in some cases:
reset init
JTAG tap: at91sam9260.cpu tap
