> Hi All,
>
> I am using an FT2232D based debugger board with the Olimex LPC1766 STK
> development board. I have compiled the latest OpenOCD and am running
> it from Cygwin.
> I also am running GDB from within eclipse(Zylin) ... although that is
> irrelevant since the same error exists on the com
On 2010-10-11 22:04, Bernard Mentink wrote:
target remote localhost:
load
mon reset init
thb main
You need to halt the chip before flashing anything on it. Try this:
target remote localhost:
mon reset init
load
thb main
4\/3!!
___
Openocd-de
Hi Bernard,
Bernard Mentink wrote:
> it gets to the main breakpoint ok, but then when I continue goes
> off into the weeds, please see the attached .doc file for a
> snapshot of the error in eclipse ... Seems to try to execute code
> at 0xfff0.
Even if the people you normally correspond with
Am 11.10.2010 22:04, schrieb Bernard Mentink:
>> # LPC2000 & LPC1700 -> SRST causes TRST
>> reset_config srst_pulls_trst
That does not work for me anymore since the "Cortex-M3 reset handling"
patch is in. Have you tried
"reset_config srst_only"?
>> target remote localhost:
Here must be a "m
pment-boun...@lists.berlios.de
[mailto:openocd-development-boun...@lists.berlios.de] On Behalf Of Jörg Fischer
Sent: Wednesday, 13 October 2010 9:13 a.m.
To: openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
> If I set to 20khz, I get perfect debugging no errors ..
I have found that the JTAG clock needs to be *really* low
when the system is running off an RC oscillator. Once on a
PLL, you can crank up the speed. This was observed on an
LPC1768, but also one other system I fail to recall which...
RCLK
om]
Sent: Wednesday, 13 October 2010 10:02 a.m.
To: Bernard Mentink
Cc: Jörg Fischer; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
> If I set to 20khz, I get perfect debugging no errors ..
I have foun
the same as Lying ... BRM
>
> -Original Message-
> From: Øyvind Harboe [mailto:oyvind.har...@zylin.com]
> Sent: Wednesday, 13 October 2010 10:02 a.m.
> To: Bernard Mentink
> Cc: Jörg Fischer; openocd-development@lists.berlios.de
> Subject: Re: [Openocd-development] Prob
örg Fischer; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
On Tue, Oct 12, 2010 at 11:25 PM, Bernard Mentink
wrote:
> Ok, thanks, although I still don't understand why the example
> LPC1768.cfg scrip
> Is there any way to download the imake at 500khz, then switch
>to 10khz for the debugging With the currect reset sequence I am using?
Look at board/mcb1700.cfg
Debugging is probably stable at higher clock rates once the PLL is running.
--
Øyvind Harboe
US toll free 1-866-980-3434 / Inter
Bernard Mentink
Cc: Jörg Fischer; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
> Is there any way to download the imake at 500khz, then switch to 10khz
>for the debugging With the currect rese
> mon reset halt
Resetting turns the RC oscillator back on, and you're not running
the init script to set up the PLL again...
--
Øyvind Harboe
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash prog
om: Øyvind Harboe [mailto:oyvind.har...@zylin.com]
Sent: Wednesday, 13 October 2010 10:57 a.m.
To: Bernard Mentink
Cc: Jörg Fischer; openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
> mon reset halt
Resetting
Hi,
Am 12.10.2010 23:36, schrieb Bernard Mentink:
> Yes, you are correct, I was looking at an old script that had it set to
> 500khz.
This work for me _reliable_ on a custom lpc1768 board:
adapter_khz 500
#delays on reset lines
adapter_nsrst_delay 30
adapter_nsrst_assert_width 100
jtag_ntrst_d
t: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
Hi,
Am 12.10.2010 23:36, schrieb Bernard Mentink:
> Yes, you are correct, I was looking at an old script that had it set to
> 500khz.
This work for me _reliable_ on a custom lpc1768 board:
adapter_
2010/10/13 Jörg Fischer :
> Hi,
> Am 12.10.2010 23:36, schrieb Bernard Mentink:
>> Yes, you are correct, I was looking at an old script that had it set to
>> 500khz.
>
> This work for me _reliable_ on a custom lpc1768 board:
>
> adapter_khz 500
>
> #delays on reset lines
> adapter_nsrst_delay 30
>
On Tue, Oct 12, 2010 at 11:59 PM, Bernard Mentink
wrote:
> Ah, got you ... So I should be doing another mon reset init again?
Depends on what you need to do. Scenario:
reset init
# loads app into flash
load
reset halt
# Now we're slow again
# debug slow startup w/slow clock
break main
c
# We can
Hi,
Am 13.10.2010 08:23, schrieb Øyvind Harboe:
> 2010/10/13 Jörg Fischer :
>> This work for me _reliable_ on a custom lpc1768 board:
>>
>> adapter_khz 500
>>
>> #delays on reset lines
>> adapter_nsrst_delay 30
>> adapter_nsrst_assert_width 100
>>
>> jtag_ntrst_delay 2
>> jtag_ntrst_assert_width 10
erlios.de] On Behalf Of Jörg Fischer
Sent: Friday, 15 October 2010 8:32 a.m.
To: openocd-development@lists.berlios.de
Subject: Re: [Openocd-development] Problem getting reliable "reset init" on
LPC1766 target.
Hi,
Am 13.10.2010 08:23, schrieb Øyvind Harboe:
> 2010/10/13 Jörg Fischer :
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