On Thu, 28 Jul 2016 10:50:08 -0400
Jay Pipes wrote:
> Roman, great thread, thanks for posting! Comment inline :)
Thanks!
>
> > It can identified 3 levels of FPGA resources, which can be nested one
> > on the others:
> >
> > 1. Whole FPGA. If used discrete FPGA, than even today it might be pass
On 07/20/2016 05:07 AM, Daniel P. Berrange wrote:
For FPGA, I'd like to see an initial proposal that assumed the FPGA
is pre-programmed & pre-divided into a fixed number of slots and simply
deal with this.
For the record, this is precisely what is described in the first version
of the dynamic-
> On Jul 28, 2016, at 7:57 AM, Jay Pipes wrote:
>
> On 07/19/2016 06:51 PM, Ed Leafe wrote:
>> On Jul 19, 2016, at 2:58 PM, Chris Friesen
>> wrote:
Why would a VM program the slot? Wouldn’t it usually be at the
host level?
>>>
>>> Are there no cases where a VM might want to download
On 07/19/2016 06:51 PM, Ed Leafe wrote:
On Jul 19, 2016, at 2:58 PM, Chris Friesen
wrote:
Why would a VM program the slot? Wouldn’t it usually be at the
host level?
Are there no cases where a VM might want to download a proprietary
program into an FPGA?
That doesn’t sound right to me, but m
Roman, great thread, thanks for posting! Comment inline :)
On 07/19/2016 02:03 PM, Roman Dobosz wrote:
It can identified 3 levels of FPGA resources, which can be nested one
on the others:
1. Whole FPGA. If used discrete FPGA, than even today it might be pass
through to the VM.
2. Region in
On Jul 21, 2016 5:12 AM, "Daniel P. Berrange" wrote:
>
> On Thu, Jul 21, 2016 at 07:54:48AM +0200, Roman Dobosz wrote:
> > On Wed, 20 Jul 2016 10:07:12 +0100
> > "Daniel P. Berrange" wrote:
> >
> > Hey Daniel, thanks for the feedback.
> >
> > > > Thoughts?
> > >
> > > I'd suggest you'll increase
On Thu, Jul 21, 2016 at 07:54:48AM +0200, Roman Dobosz wrote:
> On Wed, 20 Jul 2016 10:07:12 +0100
> "Daniel P. Berrange" wrote:
>
> Hey Daniel, thanks for the feedback.
>
> > > Thoughts?
> >
> > I'd suggest you'll increase your chances of success with nova design
> > approval if you focus on i
On Thu, 21 Jul 2016 08:56:07 +0800
Fei K Chen wrote:
> > Unless you have one FPGA with 8 slots, which can become FPGA with 4
> > slots. From scheduling perspective you have to know, which FPGA
> > resources can be reconfigured, and which not, isn't it? Also, AFAIRC
> > to provide VM with VF, ther
On Thu, 21 Jul 2016 08:44:21 +0800
Fei K Chen wrote:
> > 4. It might be also necessary to track every VF individually, although
> >I didn't assumed it will be needed, nevertheless with nested
> >resources it should be easy to handle it.
> You need. For example you have 4 region and 8 VF.
On Wed, 20 Jul 2016 10:07:12 +0100
"Daniel P. Berrange" wrote:
Hey Daniel, thanks for the feedback.
> > Thoughts?
>
> I'd suggest you'll increase your chances of success with nova design
> approval if you focus on implementing a really simple usage scheme for
> FPGA as the first step in Nova.
Roman Dobosz wrote on 2016/07/20 15:25:28:
> From: Roman Dobosz
> To: "OpenStack Development Mailing List (not for usage questions)"
>
> Cc: Ed Leafe
> Date: 2016/07/20 15:30
> Subject: Re: [openstack-dev] FPGA as a dynamic nested resources
>
>
> >
Roman Dobosz wrote on 2016/07/20 02:03:28:
> From: Roman Dobosz
> To: openstack-dev
> Date: 2016/07/20 02:07
> Subject: [openstack-dev] FPGA as a dynamic nested resources
>
> Hi all,
>
> Some time ago Jay Pipes published etherpad[1] with ideas around
> modelling ne
On Jul 20, 2016, at 2:07 AM, Daniel P. Berrange wrote:
> For FPGA, I'd like to see an initial proposal that assumed the FPGA
> is pre-programmed & pre-divided into a fixed number of slots and simply
> deal with this. This is similar to how we dealt with PCI SR-IOV initially
> where we assumed the
On Tue, Jul 19, 2016 at 08:03:28PM +0200, Roman Dobosz wrote:
> Hi all,
>
> Some time ago Jay Pipes published etherpad[1] with ideas around
> modelling nested resources, taking NUMA as an example. I was also
> encouraged ;) to start this thread, on last Nova scheduler meeting.
>
> I was read ment
On Tue, 19 Jul 2016 15:51:26 -0700
Ed Leafe wrote:
> >> Why would a VM program the slot? Wouldn’t it usually be at the
> >> host level?
> >
> > Are there no cases where a VM might want to download a proprietary
> > program into an FPGA?
>
> That doesn’t sound right to me, but maybe I’m just not t
On Tue, 19 Jul 2016 12:40:50 -0700
Ed Leafe wrote:
> > It can identified 3 levels of FPGA resources, which can be nested one
> > on the others:
> >
> > 1. Whole FPGA. If used discrete FPGA, than even today it might be pass
> > through to the VM.
> Can you explain why this would ever be useful?
On Jul 19, 2016, at 2:58 PM, Chris Friesen wrote:
>> Why would a VM program the slot? Wouldn’t it usually be at the host level?
>
> Are there no cases where a VM might want to download a proprietary program
> into an FPGA?
That doesn’t sound right to me, but maybe I’m just not that familiar wi
On 07/19/2016 01:40 PM, Ed Leafe wrote:
On Jul 19, 2016, at 11:03 AM, Roman Dobosz wrote:
It can identified 3 levels of FPGA resources, which can be nested one
on the others:
1. Whole FPGA. If used discrete FPGA, than even today it might be pass
through to the VM.
Can you explain why thi
On Jul 19, 2016, at 11:03 AM, Roman Dobosz wrote:
> It can identified 3 levels of FPGA resources, which can be nested one
> on the others:
>
> 1. Whole FPGA. If used discrete FPGA, than even today it might be pass
> through to the VM.
Can you explain why this would ever be useful? IOW, what c
Hi all,
Some time ago Jay Pipes published etherpad[1] with ideas around
modelling nested resources, taking NUMA as an example. I was also
encouraged ;) to start this thread, on last Nova scheduler meeting.
I was read mentioned etherpad and what hits me was that described
scenario with NUMA cells
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