On Sat, Jan 26, 2019 at 1:31 AM Waldek Kozaczuk
wrote:
> Thanks for reviewing this patch.
>
> On Wednesday, January 23, 2019 at 5:10:56 PM UTC-5, Nadav Har'El wrote:
>>
>>
>> So I'm really curious *why* this EMMS is needed beyond the one we added
>> to the
>> FPU save) because it's possible that
On Friday, January 25, 2019 at 6:31:11 PM UTC-5, Waldek Kozaczuk wrote:
>
> Thanks for reviewing this patch.
>
> On Wednesday, January 23, 2019 at 5:10:56 PM UTC-5, Nadav Har'El wrote:
>>
>> On Wed, Dec 19, 2018 at 2:26 PM Waldemar Kozaczuk
>> wrote:
>>
>>> This patch adds "emms" instruction in
Thanks for reviewing this patch.
On Wednesday, January 23, 2019 at 5:10:56 PM UTC-5, Nadav Har'El wrote:
>
> On Wed, Dec 19, 2018 at 2:26 PM Waldemar Kozaczuk > wrote:
>
>> This patch adds "emms" instruction in critical places
>>
>
> Thank you so much for working on this, and sorry for having del
On Thu, Jan 24, 2019 at 12:10 AM Nadav Har'El wrote:
> On Wed, Dec 19, 2018 at 2:26 PM Waldemar Kozaczuk
> wrote:
>
>> This patch adds "emms" instruction in critical places
>>
>
> Thank you so much for working on this, and sorry for having delayed my
> review for SO long.
> I'm basically happy w
On Wed, Dec 19, 2018 at 2:26 PM Waldemar Kozaczuk
wrote:
> This patch adds "emms" instruction in critical places
>
Thank you so much for working on this, and sorry for having delayed my
review for SO long.
I'm basically happy with this patch except one thing that nags me - I don't
understand why
Bump!
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This patch adds "emms" instruction in critical places
of OSv thread scheduler code to reset FPU state after it is saved
upon involuntary context switch (for example interrupt) and right
after executing context switch on new thread to clear FPU status word.
Clearing FPU status word is necessary beca
Please note that adding emms instruction right after saving FPU state is
enough to make the new unit test pass, however it is not enough to fix
issues #536, #1010 and #1018. Which means that somehow sometimes in
voluntary task switch scenarios (sleep, etc) FPU gets in a non-clean state.
So addi
This patch add "emms" instruction in critical places
of OSv thread scheduler code to reset FPU state after it is saved
upon involuntary context switch (for example interrupt) and right
after executing context switch on new thread to clear FPU status word.
Clearing FPU status word is necessary becau
