A packet going from HW VTEP device to VIF port when arrives to
hypervisor chassis should go through LS ingress pipeline to l2_lkp
stage without any match. In l2_lkp stage an output port is
determined and then packet passed to LS egress pipeline for futher
processing and to VIF port delivery.
Prior
On Fri, Sep 17, 2021 at 5:56 PM Vladislav Odintsov wrote:
>
> A packet going from HW VTEP device to VIF port when arrives to
> hypervisor chassis should go through LS ingress pipeline to l2_lkp
> stage without any match. In l2_lkp stage an output port is
> determined and then packet passed to LS e
Hi Numan,
thanks. I’m okay with your changes.
Recently I’ve seen report about this problem with RAMP/VTEP on the list,
so since it’s a bugfix, I think it would be great to backport it down to
branches.
Though, there are a lot of conflicts with older branches, I’ve submitted the
backport for 21.
