Gopal V wrote:
inline op conv_u1_ovf(inout INT) {
- if($1 >= 0 && $1 <= 256 ) {
+ if($1 >= 0 && $1 <= 255 ) {
Thanks, applied
leo
Nicholas Clark wrote:
(do all the unsigned with masks)
Yep
And we ought to make a generic "safe" version of the code for signed
truncation that works for platforms that are any or all of the following
holds
I tried this one:
inline op conv_i1(inout INT) {
#if 1
INTVAL x = $1;
x <<=
Nicholas Clark wrote:
But I was envisaging for ARM that r12 or r14 ought to be the scratch
register. The way the ABI works, with r12 trashed on function call entry,
but r0 used to return values from functions means that r12 is available
within an op, while mapping r0 to a parrot register for the
On Tue, Nov 26, 2002 at 01:51:47PM +0100, Leopold Toetsch wrote:
> Either we fix this, or the registers have to be renumbered, so that reg
> #0 is not used. The emit_code for registers could take care of this.
That's a crafty trick. nothing wrong with that :-)
> Currently no architecture has thi
Nicholas Clark wrote:
On Tue, Nov 26, 2002 at 09:55:00AM -, Leopold Toetsch wrote:
+B
+
+The Ith integer or floating processor register, mapped in this section.
+
+Note: The register with the physical number zero can not be mapped.
+
+=begin unimp
+
Why can't it be mapped? Funda
On Tue, Nov 26, 2002 at 09:55:00AM -, Leopold Toetsch wrote:
> +B
> +
> +The Ith integer or floating processor register, mapped in this section.
> +
> +Note: The register with the physical number zero can not be mapped.
> +
> +=begin unimp
> +
Why can't it be mapped? Fundament
