s found.
scan-build: Run 'scan-view
/Users/jeremy/src/freedesktop/jhbuild/analyzer/yuffie/20120221-1900/pixman/2012-02-21-1'
to examine bug reports.
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From: Søren Sandmann Pedersen
Also a few minor formating fixes.
---
pixman/pixman-mmx.c | 18 +-
1 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/pixman/pixman-mmx.c b/pixman/pixman-mmx.c
index 609e532..a3500ce 100644
--- a/pixman/pixman-mmx.c
+++ b/pixman/pixman
From: Søren Sandmann Pedersen
It used to be slower than the generic code (with the gcc that was
current in 2007) that doesn't seem to be the case anymore:
over_x888_8_ = L1: 22.97 L2: 22.88 M: 22.27 ( 5.29%) HT: 18.30 VT:
15.81 R: 15.54 RT: 10.35 ( 131Kops/s)
over_x888_8_ = L
On Tue, Feb 21, 2012 at 3:26 PM, Siarhei Siamashka
wrote:
> Yes, it is a somewhat acceptable solution (if we forget about the
> PrepareForStore prefetch for a moment). Though pixman DSPr2 optimized
> code will not have any chance to provide any speedup in such distros.
Except for those of us who
On Tue, Feb 21, 2012 at 8:24 PM, Matt Turner wrote:
> How does this affect compiling with -march=mips64{,r2}, assuming that
> there are mips64 CPUs with DSPr2?
It will likely either build without DSPr2 optimizations (by failing
the DSPr2 configure test), or fail the compilation itself. Somebody
w
On Tue, Feb 21, 2012 at 1:05 PM, Siarhei Siamashka
wrote:
> On Tue, Feb 21, 2012 at 4:59 PM, Nemanja Lukic wrote:
>>
>> Per previous code review:
>>
>> Run time detection is still there (per Siarhei's comments), uses
>> /proc/cpuinfo,
>> but now properly detects DSPr2 extensions and 32 byte cach
On Tue, Feb 21, 2012 at 4:59 PM, Nemanja Lukic wrote:
>
> Per previous code review:
>
> Run time detection is still there (per Siarhei's comments), uses
> /proc/cpuinfo,
> but now properly detects DSPr2 extensions and 32 byte cache line size (both
> are
> true only for MIPS 74Kc cores).
> - Cur
On Tue, Feb 21, 2012 at 12:24 PM, Søren Sandmann wrote:
> Matt Turner writes:
>
>> v4: use inline assembly since the intrinsic needs SSE or 3DNowA
>> - we can't use -msse, since it'll cause more SSE instructions to be
>> generated that we don't want
>> - there is no -m3dnowa f
Matt Turner writes:
> v4: use inline assembly since the intrinsic needs SSE or 3DNowA
> - we can't use -msse, since it'll cause more SSE instructions to be
> generated that we don't want
> - there is no -m3dnowa flag (anymore?)
Both patches look good to me. Just one nitpick:
From: Nemanja Lukic
Following fast-path functions are implemented (routines 4, 5 and 6 utilize
same fast-memcpy routine):
1. src_x888_
2. src__0565
3. src_0565_
4. src_0565_0565
5. src__
6. src_0888_0888
Performance numbers before/after on MIPS-74kc @
From: Nemanja Lukic
MIPS DSP instruction set extensions
---
configure.ac | 53
pixman/Makefile.am | 13 ++
pixman/pixman-cpu.c| 53
pixman/pixman-mips-dspr2.c |
Per previous code review:
Run time detection is still there (per Siarhei's comments), uses /proc/cpuinfo,
but now properly detects DSPr2 extensions and 32 byte cache line size (both are
true only for MIPS 74Kc cores).
- Currently only 74Kc core is available that supports DSPr2.
- In the futur
Hi Siarhei,
Yes, 74Kc core has 32 byte cache line size, and it has DSPr2 extensions (it is
mandatory).
I changed original patch, to search only for "MIPS 74Kc" string in the
/proc/cpuinfo since this is (for now, until 1074Kc, M14KE, and other cores
become available) only MIPS core that does sup
The pshufw x86 instruction is part of Extended 3DNow! and SSE1. The
equivalent ARM wshufh instruction was available from the first iwMMXt
instrucion set.
This instruction is already used in the SSE2 code.
Reduces code size by ~9%.
amd64
textdata bss dec hex filename
299252
The pmulhuw x86 instruction is part of Extended 3DNow! and SSE1. The
equivalent ARM wmuluh instruction was available from the first iwMMXt
instrucion set.
This instruction is already used in the SSE2 code.
Reduces code size by ~5%.
amd64
textdata bss dec hex filename
31325
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