Author: kosmo Date: Wed Aug 12 10:09:59 2009 GMT Module: packages Tag: HEAD ---- Log message: - added openocd-davinci-nand-cs.patch fixing DaVinci NAND driver.
---- Files affected: packages/openocd: openocd.spec (1.2 -> 1.3) , openocd-davinci-nand-cs.patch (NONE -> 1.1) (NEW) ---- Diffs: ================================================================ Index: packages/openocd/openocd.spec diff -u packages/openocd/openocd.spec:1.2 packages/openocd/openocd.spec:1.3 --- packages/openocd/openocd.spec:1.2 Mon Aug 3 21:22:33 2009 +++ packages/openocd/openocd.spec Wed Aug 12 12:09:54 2009 @@ -8,6 +8,7 @@ Group: Applications Source0: http://download.berlios.de/%{name}/%{name}-%{version}.tar.bz2 # Source0-md5: 14cd477f65cc738be954a454f1593879 +Patch0: %{name}-davinci-nand-cs.patch URL: http://openocd.berlios.de/ BuildRequires: autoconf BuildRequires: automake @@ -35,6 +36,7 @@ %prep %setup -q +%patch0 -p1 %build %{__libtoolize} @@ -86,6 +88,9 @@ All persons listed below can be reached at <cvs_login>@pld-linux.org $Log$ +Revision 1.3 2009/08/12 10:09:54 kosmo +- added openocd-davinci-nand-cs.patch fixing DaVinci NAND driver. + Revision 1.2 2009/08/03 19:22:33 kosmo - updated to 0.2.0 - cleaned up and added missing BRs. ================================================================ Index: packages/openocd/openocd-davinci-nand-cs.patch diff -u /dev/null packages/openocd/openocd-davinci-nand-cs.patch:1.1 --- /dev/null Wed Aug 12 12:09:59 2009 +++ packages/openocd/openocd-davinci-nand-cs.patch Wed Aug 12 12:09:54 2009 @@ -0,0 +1,26 @@ +diff -urN openocd-0.2.0.orig/src/flash/davinci_nand.c openocd-0.2.0/src/flash/davinci_nand.c +--- openocd-0.2.0.orig/src/flash/davinci_nand.c 2009-08-10 16:16:46.000000000 +0200 ++++ openocd-0.2.0/src/flash/davinci_nand.c 2009-08-10 16:19:44.000000000 +0200 +@@ -365,7 +365,7 @@ + struct davinci_nand *info = nand->controller_priv; + target_t *target = info->target; + const uint32_t fcr_addr = info->aemif + NANDFCR; +- const uint32_t ecc1_addr = info->aemif + NANDFECC + info->chipsel; ++ const uint32_t ecc1_addr = info->aemif + NANDFECC + (4 * info->chipsel); + uint32_t fcr, ecc1; + + /* Write contiguous ECC bytes starting at specified offset. +@@ -676,11 +676,11 @@ + || aemif == 0x01e10000 /* dm335, dm355 */ + || aemif == 0x01d10000 /* dm365 */ + ) { +- if (chip < 0x0200000 || chip >= 0x0a000000) { ++ if (chip < 0x02000000 || chip >= 0x0a000000) { + LOG_ERROR("NAND address %08lx out of range?", chip); + goto fail; + } +- chipsel = (chip - 0x02000000) >> 21; ++ chipsel = (chip - 0x02000000) >> 25; + } else { + LOG_ERROR("unrecognized AEMIF controller address %08lx", aemif); + goto fail; ================================================================ ---- CVS-web: http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/packages/openocd/openocd.spec?r1=1.2&r2=1.3&f=u _______________________________________________ pld-cvs-commit mailing list pld-cvs-commit@lists.pld-linux.org http://lists.pld-linux.org/mailman/listinfo/pld-cvs-commit
