At 05:05 AM 9/3/2004, Dave Courtney wrote:
For future reference this was a hidden component that could not be selected
for some reason. I did a text search on the PCB file and found a large
positive fractional X component value. To fix this I edited the schematic to
remove the component, updated th
I just thought I'd comment on the basic problem.
From my understanding, an import was done from PADS to Protel which moved
track from an assembly layer to the silkscreen layer. Good import programs
allow explicit cross-program mapping of layers, but that's another issue
As long as there is a
At 03:56 AM 6/30/2004, Leo Potjewijd wrote:
At 30-6-2004 00:34, Stephen Noftall wrote:
[In DXP,] Is there anyway to get hierarchal designs to work when a
component has 2 parts, and they go to the odd/even sub sheets? like if
1/2 of an opamp goes to sheet 1, and the other half to sheet 2. Then
th
At 08:33 AM 6/11/2004, Chris Lowe wrote:
I have a current design with a large number of polys being used around the
PSU area. Is there any way to force a redraw on all of hem to take account
of a design rule change other than doing it poly by poly?
Yes, as I recall. Select them all, then cut and
At 03:28 AM 3/14/2003, Z Hylton wrote:
I am panelizing a number of small boards, (5 caps, two SOP16 packages). I'm
using DXP and when I copy the second board, all the designator's names are
changed. C1 becomes C1_1, ...the third board has designator's changed from
C1 to C1_2... and so on.
Does anyo
At 01:25 PM 5/29/2004, Terry Harris wrote:
Having just been offered a discount to upgrade from 99SE to 2004 it's time
to think about it again. (I knew those special offers would keep coming).
Is it fit to use yet or should hold out for a couple more service packs and
the next special offer?
Don't c
At 05:57 PM 5/26/2004, Mira wrote:
Are you ready to shoot me now or I'll have one more
minute?
The leader of the firing squad says, "I'd let you have a cigarette, but
they are bad for your health"
Abd, I'm giving work away if I'd like to test
somebody. I always use one and the same design for
n
autorouter to save time, it automatically benefits the customer. Our
responsibility to the customer is to choose the appropriate techniques for
the job, balancing cost and quality.
So if you give us a PCB design to do and we ask you "how many of these do
you plan to make," now you know why w
for protel resales specifically.
[EMAIL PROTECTED]
The archive is accessible on yahoogroups.com.
Abd ul-Rahman Lomax
LOMAX DESIGN ASSOCIATES
PCB design, consulting, and training
Protel EDA license resales
Easthampton, Massachusetts, USA
(413) 527-3881, efax (419) 730-4777
[EMAIL PROTECTED
At 09:48 AM 5/18/2004, Protel Hell wrote:
In every schematic capture program I have used once two nodes are
connected the wire moves with the nodes. If the net has a name it stays
with the net as well.
I've used schematic capture programs (more than just Protel) that don't do
this, but, certainl
At 04:35 PM 5/17/2004, Ray Mitchell wrote:
I was not clear. I want to flip the entire PCB layout and be able to work
on and modify it - not just view it.
It should be understood that a Flip View option would allow just what Mr.
Mitchell has stated he wants. You could work on the board while the
At 01:39 PM 5/17/2004, Hamid Wasti wrote:
I have been there, done that, got burned to the tune of over $10K by a bad
footprint in the Protel library back in version 2.8 days. Since then, I
have never used a single footprint that I did not design myself. It is
just as quick to design it yourself
At 10:33 AM 5/17/2004, Jeff Condit wrote:
On a related note, I find having meaningful net names helps me understand
and untangle the PCB when I'm not autorouting. Therefore I would like to
name (nearly) all significant nets on the schematic.
Absolutely. This is much more useful than automatic name
At 03:03 PM 5/17/2004, Ray Mitchell wrote:
Is there a way to flip an entire PCB layout along the Y axis, thereby
producing a view of everything from the bottom layer to the top?
This has been discussed extensively, and Mr. Wilson produced a server that
would flip a whole PCB. I forget the status
At 06:41 PM 5/16/2004, Mira wrote:
I don't like editing the manual routing in both PCAD
and Protel. Orcad and Allegro are much better.
I wonder if you could describe what you don't like. What is difficult, or
tedious, or whatever about "editing the manual routing" in PCAD and Protel?
As for placi
I'm not entirely certain that I'm not missing some context here, but, for
the record:
At 04:27 AM 5/15/2004, Mira wrote:
[re PCAD] Wires? Oh, that's one of the coolest things. You can
just place the components pin to pin and they are
connected.
This is also true for Protel. In 99SE, place two pin
At 02:34 PM 5/12/2004, Brooks,Bill wrote:
In the case of PCB WEST TOP GUN, the actual design is held in confidence for
obvious reasons.
It's obvious why it would be held in confidence prior to the contest. Is it
kept in confidence for all time after that? If it were available, then one
could hold
At 08:12 AM 5/5/2004, John A. Ross [Design] wrote:
However I made a small test board, parent + 5 child sheets using the
same ID key.sch file in it and it does not show the error under the same
enviroment so the problem seems localised to the other design (or the
number of sheets).
Very good. Now, i
At 01:42 AM 5/5/2004, John Girvan wrote:
thanks all for your help... i was just playing about with some tracks and
had them at 8 mil thick on an 8mil grid spaced at 8mil edge to edge and
wanted to change them to 10mil edge to edge - thus, change the grid, 'snap
to grid' and hope! more curiosity
At 06:52 PM 5/4/2004, Leonard Gabrielson wrote:
Recently I've noticed that the autorouter is taking some real liberties
with the way it routes! i.e. traces going in a diagonal direction for a
LONG way! I vaguely remember seeing a place to set this in the routing
rules, but of course can't fin
At 06:41 PM 5/4/2004, John Girvan wrote:
As a new Protel User, coming over from Mentor 'Expedition' series, im
trying to find a 'snap to grid' option as per Mentor, im sure there is
something ive overlooked basically, i have drawn in a row of 3
straight 'dummy' tracks on an 8th grid. If i ch
At 01:17 PM 5/4/2004, John A. Ross [Design] wrote:
I am still getting some ERC errors on some pins connected to power
objects in the ERC. These errors now match up to corresponding netlist
import errors 'net already exists'
The issue seems to be where there is only one power object of the same
net
At 10:48 AM 5/4/2004, John A. Ross [Design] wrote:
Does anyone else use this method for keeping top sheets clean in 99SE?
See screenshot http://www.proteluser.com/bbs/showthread.php?p=71#post71
If you look at net labels HA[0..18], HD[0..15] and HA20/HA21/WE0 you
will see that I have added additio
At 09:58 AM 5/4/2004, John A. Ross [Design] wrote:
I have had a few discussions previously on this list about the
connectivity models within 99SE and how I have had in some cases seen
errors where power ports are not treated as global when using Sheet
Symbols/Port connections.
Haven't seen that. Su
Three times in a row, now, today, I see messages to the PEDA Forum
apparently responding to messages that obviously the list transmitted but I
did not receive.
I received two messages dated 4/25, one from Mr. Zhang Yangtian and one
from Mr. Saputelli in response, i.e., normal.
Today, 4/26, the
At 02:40 PM 4/10/2004, John A. Ross [RSDTV] wrote:
It is a sad fact that Altium would prefer to listen to the 'few' than the
many as regards how their tools are now styled, viewed and the direction
that they have taken.
This brings us to a classic problem, that of the alleged "silent majority."
Un
At 12:51 PM 4/10/2004, Christopher Coley wrote:
I am getting fairly fed up with all this negativism towards Altium.
With all due respect, if the negativism is leading to digestive
disturbances, the sensible thing is to stop reading the thread which is
clearly, on the face, about alternatives to A
At 02:44 AM 4/10/2004, [EMAIL PROTECTED] wrote:
[re Altium's essay into software maintenance fees]
And why did we reject the idea? I can not speak for you, but I can speak
for myself. There were two reasons. First, when I bought 99SE, it came
with support included in the price I paid for it.
At 03:36 PM 4/8/2004, JaMi Smith wrote:
I thought that this problem still existed in Situs, at least thru DXP PreSP3.
Has it now been fixed?
Don't ask me! What I wrote was based on reports that Situs had improved
cleanup. As I stated explicitly, I haven't yet experimented with Situs.
It is sad i
At 01:51 PM 4/2/2004, JaMi Smith wrote:
I am not quite sure just what I am supposed to be getting here in the mail
as an "upgrade" [...]
The Nanoboard is not routinely included in the automatic DXP -> 2004
upgrade. If a user bought or upgraded to DXP after a certain date, I think
it may be inclu
At 11:38 AM 3/30/2004, edsi wrote:
I receive the DXP forom information but rarely post anything there. I dont
like the idea that PRAVDA has control of what I want to say.
They have control, theoretically. In practice the DXP forum is not
moderated. They allow criticism. Alleged extended flaming h
At 04:56 PM 3/17/2004, Ian Wilson wrote:
On 08:31 AM 18/03/2004, Protel Hell said:
productivity, productivity, productivity
those are the three things that need improvement in DXP
This is an interesting comment. I don't like going back to P99SE for this
very reason. I use DXP by preference, even
At 10:40 AM 3/11/2004, Bagotronix Tech Support wrote:
As far as Activation goes, I think it blows. The only s/w I have that has
Activiation is my new Fujitsu laptop, which came with XP Pro. I don't call
what Protel has "Activation", it's a license manager. I like Protel's
license manager.
When a
At 09:53 AM 3/11/2004, Bagotronix Tech Support wrote:
BTW, I know I should take this topic to the OT forum. However, I have never
seen any activity on that forum. And I have tried to sign up for it 2 or 3
times in the past, but never seem to be able to get on it. I think I did
the sign-up proce
At 07:12 PM 3/9/2004, Brooks,Bill wrote:
Funny, I blame Microsoft for our acceptance of software with 'bugs' in it...
I tell you what... If I found bugs in something I bought from the grocery
store... I would take it back.
You wouldn't do that if you were hungry enough and there was no other
groce
Ironic, isn't it, that this thread has been filled with sometimes harsh
complaint, while the title is as it is. I look at my mail list and see,
repeated over and over "2004 DXP Looks Great." I agree with that, as well
as with some of the criticism here.
Note that the criticism in this thread i
[sigh...]
At 09:34 PM 3/8/2004, JaMi Smith wrote:
This is kind of what I was trying to address in the DXP Forum with a post
there, before Nick stepped in and totally side-stepped the issue by
telling me to go read a link.
Pesky fellow, he, distracting us from our monomanias.
People keep calling
At 08:40 PM 3/4/2004, Leo Potjewijd wrote:
All the vias that are placed during interactive routing (switching layers)
show the big expansion , all the vias that are placed with the Place Via
command are tented.
From all the discussion which has preceded, this is exactly expected
behavior. The "
At 09:41 AM 2/28/2004, Robert Ritchey wrote:
Does anyone know what the going rate for an upgradable 99SE
package is approximately? Any help would be greatly appreciated
as I have no idea and would like to make a reasonable offer when
a package comes along.
I'm in the process of completing a sale at
Users of this list (PEDA) should be aware that there is a backup list
operated by the Protel Users Association, [EMAIL PROTECTED] It
was created to be of use at those times when the PEDA list might be down.
It is also open for general information for Protel users, *but* we request
that users no
At 09:55 AM 2/3/2004, Leo Potjewijd wrote:
I changed the schematic (just a single sheet) to include all connectors
and their interconnections (almost all of them got a new refdes); then I
changed the PCB manually to add the new ones, delete the unwanted ones and
renumbered them all according to
At 05:42 PM 2/2/2004, Dom Bragge wrote:
Thanks all for your suggestions.
I have taken the 3pin library part, 5pin footprint approach, there being
three Pin2's on the footprint: the normal middle pin, another for the
large mounting hole & one surface mount pin to give copper pad &
soldermask ant
At 06:10 PM 1/29/2004, Kerry Berland wrote:
We did a custom project last year in which we were asked to use Orcad Layout
in place of Protel. It was an ordeal. Lacked behind Protel in dozens of
ways. Error checking was poor, user interface difficult to learn, limited
undo, many other shortcomings. O
At 02:21 AM 1/29/2004, Tony Karavidas wrote:
This will DRC properly because of the manual net assignment, however the
thing to watch is when you do an UpdatePCB from the schematic. It will try
and generate a macro to remove U?_PAD0 from net GND. Just delete that macro
and continue.
This is why it i
At 02:41 PM 1/26/2004, Steve Smith wrote:
I just got a phone call from David Murphy of the
Eng-Tips web site www.eng-tips.com .
He was asked by one of his members if he should start a Protel forum
and after talking it over with him for several minutes, concluded that
he should.
Now, I wonder, wer
At 05:01 PM 1/16/2004, Dan Enslen wrote:
I've been searching the archives and haven't found an answer to my
question. What is and how do you use the mask feature in the design rules?
ie: Component Clearance Rule. If you choose footprint or component there is
a field for Mask. Thank you.
It
At 09:27 PM 1/15/2004, you wrote:
The "missing" hole is for a plastic locating pin in a blow moulded housing.
Hence no need for copper to allow for screw head size, as there is no screw.
I thought that was a possibility. No need for copper, but also, most
likely, no harm. I would not make this an
At 09:12 PM 1/15/2004, Drew Mills wrote:
Well my problem is solved, but I still cannot explain why. The pad was on
the top layer, instead of multilayer as I intended. Changing to multilayer
and re-generating the gerbers sorted it. I would have thought though that it
doesn't matter what layer the pa
At 01:11 PM 1/15/2004, Leo Potjewijd wrote:
Help!
It may just be my memory playing tricks (already pulled over 40 hours this
week), but I thought that the annular ring design rules used the same math
(i.e. the difference between the radii) for both pads and vias.
Some of the Protel documentation
At 03:01 AM 1/15/2004, Edi Im Hof wrote:
[I had written:]
By the way, it appears you have vias thermally relieved. That is probably
not the best practice, it is better to set a design rule so that all vias
are direct-connect. Vias do not generally need thermal relief, and direct
connection has t
At 12:50 PM 1/15/2004, Tim Fifield wrote:
It appears that my polygons are in direct connect mode when my design rules
state that they are in relief mode. Is there something I'm missing?
Probably. Let's go over the basics.
There are two sets of connection rules: those for copper pour and those for
At 10:54 PM 1/14/2004, Drew Mills wrote:
I completed the layout of a small PCB (99SE) designed for enclosure in a
moulded case, then realised I needed an additional hole for mechanical
locking. So I added a free pad, with no copper - just the correct hole size.
Everything looks good in PCB, but now
At 02:06 AM 1/14/2004, Juha Pajunen wrote:
Pleace see this file:
http://groups.yahoo.com/group/protel-users/files/junk/PLANE_ERROR.jpg
You are seeing a composite display, not just the plane. You can tell
because, inside one of the thermal reliefs, there is a square pad, which
would be the multila
At 05:06 AM 1/14/2004, you wrote:
While updating a schematic that has many parts with hidden fields I found
that a lot of these hidden fields need to re-appear. After unhiding the
part description of several parts in the Sch editor I cannot help but
thinking that there must be an easier way than
At 06:48 PM 1/8/2004, Dom Bragge wrote:
Further to this (somewhat harking back to the old days - process tends to
improve over time) there is quite a deal of XY expansion in the copper
planes, especially during wave soldering, which can lead to cracks forming
at the knee (where a copper plane tu
At 07:25 PM 1/8/2004, Steve Smith wrote:
What would be a reasonable amount of time to come up to speed on the
schematic capture portion of DXP? I have experience is several different
CAD packages (Viewlogic, Orcad, CadInt, etc) so I understand the process.
I've spent several frustrating days in DX
At 10:02 PM 1/8/2004, Dennis Saputelli wrote:
anyone know why ONLINE DRC might have stopped working for me?
I certainly don't know, except that a stray cosmic ray can cause any
program to stop working
However, the fact that another ddb has DRC working pretty much rules out a
program glitch.
At 09:39 AM 1/7/2004, Website Visitor wrote:
Does anyone have any experience running Protel 99SE on WinXP? I'm curious
whether it will work at all.
It's running fine for me, I have WinXP on my newest notebook.
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mail
At 02:14 PM 1/7/2004, you wrote:
Is there a way to define whether or not connections to Planes get a
Thermal Relief,
and if so, what type, by the area of the Board in which they occur?
In 99SE, this would be controlled by a Design Rule, and the choices for
scope are Board, Footprint, Component/C
At 02:07 PM 1/7/2004, you wrote:
Does anyone know a source or information for the format of Protel 99SE ASCII
PCB files. I intend to modify ASCII files but would like to know the real
format.
It's self-documenting, as you will see if you open it with, say, Word. The
field separator is | if you
At 04:40 AM 1/6/2004, you wrote:
In the near future I am going to layout a board (in Protel 99SE) with high
speed digital signals (PC motherboard). The tracks in some of the buses must
be of same length due to the high speeds and I must use the "Equalize Net
Lengts" function.
Anybody who has experi
At 04:35 PM 1/6/2004, you wrote:
This is the way I usually work. As discovered by some of the EDA
readers here a year or so back, my default clearance design rule is '0' by
default. My silkscreen within my public online custom library exactly
defines the outer physical restrictions for it's co
At 03:45 AM 12/23/2003, Edi Im Hof wrote:
I have an inquiry for a layout, but the customer uses DXP and I'm still on
P99SE. He wants to deliver me the schematics and the pcb-library or a
'pre-placed' board.
Is this doable?
It should be. The appropriate file formats are available in DXP under
Fil
At 03:52 AM 12/22/2003, Hamid A. Wasti wrote:
Abd ul-Rahman Lomax wrote:
Cynicism is the most widespread disease in our time
[...] this is not a political forum, so lets stick to the topic.
For the topic, see the subject line. Cynicism strongly affects our
expectations.
But apparently Mr
At 02:48 AM 12/22/2003, Hamid A. Wasti wrote:
Abd ul-Rahman Lomax wrote:
Actually, I know only two reasons, legitimately, not to move to DXP if
you are currently a 99SE user.
(1) You don't have time for retraining right now *and*
(2) You can't spare the cash right now.
Any others?
(3
Regarding the situation of a power port connected to the end of a resistor
with no other instance of that power port in the schematic, i.e., it is a
single-pin net, Mr. Saputelli wrote:
i don't think 99SE ERC will catch this
With the default error matrix, yes, it does not. However, if you set al
At 05:58 AM 12/21/2003, Rene Tschaggelar wrote:
Laurie Biddulph wrote:
Is there any recommended method in Protel 99 of handling the power pins
on logic chips similar to my first method above that Protel 99 can handle
comfortably?
Let me advocate my preferred method.
I have the schematic symbol i
At 04:05 PM 12/21/2003, Hamid A. Wasti wrote:
Dennis Saputelli wrote:
it appears that the PCB side will essentially be DXP SP3
There you go believing the guys at Altium again. What next? Are you now
going to start believing things that come out of the mouths of politicians?
Cynicism is the most
At 07:53 PM 12/19/2003, Tony Karavidas wrote:
There are so many reasons voiced as to why to not move to DXP.
Here is one reason TO MOVE to DXP. It now checks for that error.
Actually, I know only two reasons, legitimately, not to move to DXP if you
are currently a 99SE user.
(1) You don't have ti
At 09:42 PM 12/19/2003, Dennis Saputelli wrote:
i once had a power port symbol "+12V2" connected to one end of
a resistor
the rest of the board was all "+12V" for that power and i didn't
notice it
good 'ol cut and paste - it wasn't my fault! :)
anyway the resistor didn't go anywhere on one end
and
About half my messages to the Forum are now bouncing back with a message
that the mail server can't access techservinc.com. Might be a problem with
my domain host, to be sure This one is resent. Usually the resent
messages get through.
At 11:25 AM 12/17/2003, Protel Hell wrote:
whew! lots t
At 02:40 PM 12/16/2003, Protel Hell wrote:
so what's the excuse for pcb not matching schematic?
The history was two different DOS programs... Then there are differences in
what is natural with schematics and what is natural with PCB design. In
schematic, symbol representation is important but not
It occurs to me that something I wrote was less than clear.
At 05:33 PM 12/15/2003, Abd ul-Rahman Lomax wrote:
I've been starting to use DXP, and my first impressions are
(1) DXP has some very nice features
(2) As others have noted, there is a learning curve.
I wrote abou
At 12:12 PM 12/15/2003, Protel Hell wrote:
ha, ha, ha! how about Don't eXpect Productivity?
DXP seems more like an 80's DOS program like Wordstar than a modern
Windows application, the ctrl-alt-keyclicks are not even consistant
between PCB-schematic-and CamTastic
This is not at all surprising.
I wrote in another thread:
At 02:11 PM 12/15/2003, Abd ul-Rahman Lomax wrote:
I wrote an extensive response in this thread last week, and it seems to
have disappeared. Last week I started to get back a few Mailer Daemon
error messages that the domain "techservinc.com" could not be re
I wrote an extensive response in this thread last week, and it seems to
have disappeared. Last week I started to get back a few Mailer Daemon error
messages that the domain "techservinc.com" could not be reached. But some
messages did get through and in this case I got no error message We'll
{this message bounced first time, outgoing mail server couldn't find
"techservinc.com")
At 06:10 AM 12/10/2003, Laurie Biddulph wrote:
I hate having power supply pins as part of schematic component symbols
(especially opamps and logic gate chips). I prefer to create an additional
`component
At 01:11 PM 12/10/2003, Harry Selfridge wrote:
[an excellent discussion of signal noise, etc., particularly emphasizing
what should be on every designers radar: return path.]
I might add that the rule that inexperienced engineers frequently use
without thought - to connect analog and digital gro
I thought Mr. Bagget's comments deserved a more detailed response.
At 10:21 AM 12/9/2003, Bagotronix Tech Support wrote:
Imagine if you were the Protel computer program. The user would need to
tell you in an unambiguous manner how these double pins were instantiated.
If they are given the same na
At 10:21 AM 12/9/2003, Bagotronix Tech Support wrote:
As to the old question of how Protel treats pads with the same name/number:
we don't know for sure, and cannot find out. And anything we assume is
likely to become incorrect across versions. So it's best to use unique pin
names/numbers.
Perhap
A note on the etiology of the Protel Octagonal pad mess:
The original Gerber specification for octagonal pads was somewhat
ambiguous. It appears that the Protel programmers didn't realize the
ambiguity and nail it down, an easy mistake to make. Anyway, when the
specification was rewritten to re
At 04:46 PM 12/5/2003, Rene Tschaggelar wrote:
A footprint of a connector, the microstac of ERNI, contains
each two faces per pin. Each pin is just one piece of brass, but not
touching in its middle. An explicitely not having copper there.
So I placed two pins with the same number each. Protel 99SE
At 05:34 PM 12/2/2003, you wrote:
Now, I have several throughhole pads that should connect to a
midlayer. They appear not to connect though. Beside the
4 90degree sectors, that form a heat resistance, also a
ring can bee seen, obviously isolating the hole.
The vias only have the sectors, not the ri
At 09:42 PM 11/20/2003, JaMi Smith wrote:
What I perceive from my original reading of the announcement is that
Protel / Altium is going to drop DXP and nVisage DXP (DXPnV), and
replace it with a new product, Protel 2004 (P04), which will be given to
all current DXP and DXPnV (collectively "DXP(nV)"
At 02:56 AM 11/20/2003, JaMi Smith wrote:
Maybe I just need to get a good nights sleep before I try and read this
thing again.
Maybe you should follow that practice every time you think that Altium is a
collection of idiots and you are tempted to fly off the handle as you did.
[...]
Seriously, I
At 06:53 PM 11/19/2003, Terry Creer wrote:
If it's coming to that, for the first 3 callers, I'll give you a FREE
$50 GIFT VOUCHER*
*Vouchers are only redeemable at the Bombaloocha Village, Hai-ke-koo Island,
1200 kms west, 890 kms south of Tasmania, Australia. Take your snow gear,
cause it's co
At 06:07 PM 11/19/2003, Steve Wiseman wrote:
Sounds to me like sorting the BOM based on footprint will get the
answer as accurately as is needed for this...
I'd agree, generally. There might be an exception; perhaps a board has a
huge pile of discrete SMT and through-hole devices. However:
There'
At 05:42 PM 11/19/2003, William Dager wrote:
Seems like we have a bidding war going on here. Got a taker at $50,
several at $0.00, anybody want to make a bid at paying ME $50? You'll
get the file!
Just a little comment on this situation. One user offered to do the
conversion for a fee that was n
At 12:08 PM 11/19/2003, Dennis Saputelli wrote:
yeah i agree (although i haven't seen this particular bug)
'just say no' to the protel text editor
it's not very good and too idiosyncratic anyway
I think the text editor has some problems with fonts You can set the
font that is displayed, but so
At 05:35 AM 11/19/2003, Leo Potjewijd wrote:
At 19/11/2003 01:09, Abd ul-Rahman Lomax wrote (among other things):
[a list of assumptions]
I must say that these statements are not entirely correct: many SMD
connectors need holes in the PCB for positioning or letting the mating
part through.
I
At 07:09 PM 11/18/2003, Abd ul-Rahman Lomax wrote:
It is rare, however, that a surface mount component would have any
through-hole pads associated with it. Vias, yes, maybe, pads, no. (Of
course, Protel treats vias and pads somewhat interchangeably, but one
could ordinarily choose to use vias
At 02:18 PM 11/18/2003, Leo Potjewijd wrote:
With just a schematic and a textfile open (schematic active), I printed
the schematic and then switched to the textfile. When I hit the printer
button to print the textfile the PC rebooted.
I can not remember if I printed the text some time earlier in
At 04:38 AM 11/18/2003, you wrote:
The Protel 99SE has a Report Generating Mechanism for BOM creation.
I want an add-on utility or a process script that can separately count the
number of SMD and Through-hole components. Can someone comment on it ?.
The Protel database does not contain ful
At 02:58 PM 11/17/2003, [EMAIL PROTECTED] wrote:
There was a Bitmap converter that you could download from the forum web
sight. I still have a copy of it and could e-mail it too you.
The converter was never on the "forum" web site, it was on the protel-users
web site on yahoogroups, in the file se
At 08:53 PM 11/4/2003, you wrote:
What a do know is the 200,000 ALU shares I own are
now half what I paid for them with only 2 cent
div for the last year, the IPO was at $2.00 so they
have lost several hundred million of shareholders
money..
Or, you might say, they have invested it in forms th
At 05:04 PM 11/4/2003, Patrick Smeets wrote:
1) When I want to export my Protel DXP file to gerber and an NC drill file
then sometimes the output is not readable in an independent gerber viewer
like Gerbview, only in Camtastic - which is an Altium product.
It's pretty likely that if Gerbview is pro
At 08:53 PM 11/3/2003, Darren wrote:
Not sure where that number comes from, but Altium
sales where around 50 Mill AUD or 35 Mill USD, for
2002.
That's "Consolidated Entities," AU$52 million for fiscal 2002, which
includes the companies owned by Altium. From the report, however, these
seem to be
At 08:44 PM 11/3/2003, you wrote:
interesting
what is that in US$ ?
US$1.00 is roughly AU$1.50
at the 12 mil level double is a lot!
So it ends up as $US16 million. But I''m not at all sure how to relate that
figure to what's in the annual report. Altium Ltd itself shows fiscal 2003
revenue of AU
I see this mail didn't go out when I wrote it so here it is.
At 03:16 AM 10/30/2003, Website Visitor wrote:
I have not found a way yet to disable, or stop, Protel from routing GND
traces. I have a GND plane and all of the components are connected to it
via thermals. However, when ever I us
At 01:03 PM 11/1/2003, Dennis Saputelli wrote:
I don't know how many people Altium has but these days $12 mil
gross revenue is not a huge number for an international going
enterprise
true. But the revenue for Altium, estimated based on 3rd quarter 2003
annualized, is about double that. Still not h
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