[pypy-commit] pypy cpyext-ext: add protective hack to work around PyString_Type missing a ob_type reference, give up writing a test to properly fix it

2016-01-05 Thread mattip
Author: mattip Branch: cpyext-ext Changeset: r81595:d32637ebd6d9 Date: 2016-01-05 01:11 +0200 http://bitbucket.org/pypy/pypy/changeset/d32637ebd6d9/ Log:add protective hack to work around PyString_Type missing a ob_type reference, give up writing a test to properly fix it diff --git

[pypy-commit] pypy cpyext-ext: inherit tp_as... slots from base, need to test?

2016-01-05 Thread mattip
Author: mattip Branch: cpyext-ext Changeset: r81596:26ff9bd62015 Date: 2016-01-05 23:15 +0200 http://bitbucket.org/pypy/pypy/changeset/26ff9bd62015/ Log:inherit tp_as... slots from base, need to test? diff --git a/pypy/module/cpyext/typeobject.py b/pypy/module/cpyext/typeobject.py --- a/pypy

[pypy-commit] pypy.org extradoc: update the values

2016-01-05 Thread arigo
Author: Armin Rigo Branch: extradoc Changeset: r690:39785461a869 Date: 2016-01-05 19:13 +0100 http://bitbucket.org/pypy/pypy.org/changeset/39785461a869/ Log:update the values diff --git a/don1.html b/don1.html --- a/don1.html +++ b/don1.html @@ -15,7 +15,7 @@ - $62641 of $105000 (

[pypy-commit] pypy exctrans: Call funcgen.patch_graph() before source generation rather than in the middle of it

2016-01-05 Thread rlamy
Author: Ronan Lamy Branch: exctrans Changeset: r81594:b72c57375aa0 Date: 2016-01-05 18:40 +0100 http://bitbucket.org/pypy/pypy/changeset/b72c57375aa0/ Log:Call funcgen.patch_graph() before source generation rather than in the middle of it diff --git a/rpython/memory/gctransform/test/

[pypy-commit] pypy exctrans: hg merge default

2016-01-05 Thread rlamy
Author: Ronan Lamy Branch: exctrans Changeset: r81592:7bf2e87a1dfe Date: 2016-01-05 17:12 +0100 http://bitbucket.org/pypy/pypy/changeset/7bf2e87a1dfe/ Log:hg merge default diff too long, truncating to 2000 out of 6946 lines diff --git a/.gitignore b/.gitignore --- a/.gitignore +++ b/.gitign

[pypy-commit] pypy exctrans: Call db.prepare_inline_helpers() from a slightly more logical location

2016-01-05 Thread rlamy
Author: Ronan Lamy Branch: exctrans Changeset: r81593:405bc736b37f Date: 2016-01-05 17:39 +0100 http://bitbucket.org/pypy/pypy/changeset/405bc736b37f/ Log:Call db.prepare_inline_helpers() from a slightly more logical location diff --git a/rpython/translator/c/genc.py b/rpython/transl

[pypy-commit] pypy default: Expose SOABI in sysconfig

2016-01-05 Thread stefanor
Author: Stefano Rivera Branch: Changeset: r81591:71b4bf53487c Date: 2016-01-05 18:23 +0200 http://bitbucket.org/pypy/pypy/changeset/71b4bf53487c/ Log:Expose SOABI in sysconfig Initially, for Debian, so that dh_pypy can use it to generate useful dependencies. (https://bugs.de

[pypy-commit] pypy s390x-backend: and yet some more tests: del, dict, exception and fficall

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81590:39602618dc34 Date: 2016-01-05 16:04 +0100 http://bitbucket.org/pypy/pypy/changeset/39602618dc34/ Log:and yet some more tests: del, dict, exception and fficall diff --git a/rpython/jit/backend/zarch/test/test_del.py b/rpython/j

[pypy-commit] pypy s390x-backend: added tests: loop_unroll, virtualizable, virtualref

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81589:15095a57b881 Date: 2016-01-05 15:49 +0100 http://bitbucket.org/pypy/pypy/changeset/15095a57b881/ Log:added tests: loop_unroll, virtualizable, virtualref diff --git a/rpython/jit/backend/zarch/test/test_loop_unroll.py b/rpython

[pypy-commit] pypy s390x-backend: added test recursive, four tests to fix

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81588:f59c2e896924 Date: 2016-01-05 15:35 +0100 http://bitbucket.org/pypy/pypy/changeset/f59c2e896924/ Log:added test recursive, four tests to fix added raw memory tests (pass) diff --git a/rpython/jit/backend/zarch/test/test

[pypy-commit] pypy s390x-backend: do not use a register that might be allocated in copy_content! added comment to clarify. test_string is now passing

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81587:481b32d406e5 Date: 2016-01-05 15:28 +0100 http://bitbucket.org/pypy/pypy/changeset/481b32d406e5/ Log:do not use a register that might be allocated in copy_content! added comment to clarify. test_string is now passing di

[pypy-commit] pypy cffi-static-callback-embedding: hg merge default (including the ec-keepalive branch)

2016-01-05 Thread arigo
Author: Armin Rigo Branch: cffi-static-callback-embedding Changeset: r81585:7b81fa1c3fa9 Date: 2016-01-05 15:01 +0100 http://bitbucket.org/pypy/pypy/changeset/7b81fa1c3fa9/ Log:hg merge default (including the ec-keepalive branch) diff --git a/lib-python/2.7/pickle.py b/lib-python/2.7/pickle.

[pypy-commit] pypy default: Note

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81586:26ede037cdb3 Date: 2016-01-05 15:04 +0100 http://bitbucket.org/pypy/pypy/changeset/26ede037cdb3/ Log:Note diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst --- a/pypy/doc/whatsnew-head.rst +++ b/pypy/doc/whatsnew-head.rst @@ -1

[pypy-commit] pypy default: hg merge ec-keepalive

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81582:12f30e098f24 Date: 2016-01-05 14:59 +0100 http://bitbucket.org/pypy/pypy/changeset/12f30e098f24/ Log:hg merge ec-keepalive - fix rthread so that, at least with framework GCs, the objects stored as threadlocals don't force a minor

[pypy-commit] pypy default: Document the branch

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81583:e98964a22151 Date: 2016-01-05 15:00 +0100 http://bitbucket.org/pypy/pypy/changeset/e98964a22151/ Log:Document the branch diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst --- a/pypy/doc/whatsnew-head.rst +++ b/pypy/doc/whatsnew

[pypy-commit] pypy default: merge heads

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81584:d0004489a9cc Date: 2016-01-05 15:00 +0100 http://bitbucket.org/pypy/pypy/changeset/d0004489a9cc/ Log:merge heads diff --git a/lib_pypy/cPickle.py b/lib_pypy/cPickle.py --- a/lib_pypy/cPickle.py +++ b/lib_pypy/cPickle.py @@ -559,6 +559,7 @@ def

[pypy-commit] pypy ec-keepalive: ready for merge

2016-01-05 Thread arigo
Author: Armin Rigo Branch: ec-keepalive Changeset: r81581:cc682a90f3e2 Date: 2016-01-05 14:56 +0100 http://bitbucket.org/pypy/pypy/changeset/cc682a90f3e2/ Log:ready for merge ___ pypy-commit mailing list pypy-commit@python.org https://mail.python.o

[pypy-commit] pypy default: Add __pypy__.decode_long(), an app-level interface to

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81579:af91853285d1 Date: 2016-01-05 13:52 +0100 http://bitbucket.org/pypy/pypy/changeset/af91853285d1/ Log:Add __pypy__.decode_long(), an app-level interface to rbigint.frombytes(). Use it in the pickle.py module. diff --git a/lib-python/2.7/pi

[pypy-commit] pypy default: Fix the complexity in cPickle.py too (there's a mostly-duplicate?)

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81580:256ca06a4fb1 Date: 2016-01-05 13:50 + http://bitbucket.org/pypy/pypy/changeset/256ca06a4fb1/ Log:Fix the complexity in cPickle.py too (there's a mostly-duplicate?) diff --git a/lib_pypy/cPickle.py b/lib_pypy/cPickle.py --- a/lib_pypy/cPickle.

[pypy-commit] pypy s390x-backend: int_lshift is a logical one, but up to now emitted an arithmetic shift, this makes the test_basic of the s390x fully passing!

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81578:fec1779a7628 Date: 2016-01-05 13:50 +0100 http://bitbucket.org/pypy/pypy/changeset/fec1779a7628/ Log:int_lshift is a logical one, but up to now emitted an arithmetic shift, this makes the test_basic of the s390x fully pa

[pypy-commit] pypy exctrans: simplify code: always patch the graph in-place in funcgen

2016-01-05 Thread rlamy
Author: Ronan Lamy Branch: exctrans Changeset: r81577:6b9bb2fbc629 Date: 2016-01-05 13:39 +0100 http://bitbucket.org/pypy/pypy/changeset/6b9bb2fbc629/ Log:simplify code: always patch the graph in-place in funcgen diff --git a/rpython/translator/c/funcgen.py b/rpython/translator/c/funcgen.py

[pypy-commit] pypy s390x-backend: prevent the base loc register to be in pool

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81576:c137a0a35416 Date: 2016-01-05 13:15 +0100 http://bitbucket.org/pypy/pypy/changeset/c137a0a35416/ Log:prevent the base loc register to be in pool diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch

[pypy-commit] pypy default: fix

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81575:8752634a16ae Date: 2016-01-05 11:15 + http://bitbucket.org/pypy/pypy/changeset/8752634a16ae/ Log:fix diff --git a/rpython/rlib/rbigint.py b/rpython/rlib/rbigint.py --- a/rpython/rlib/rbigint.py +++ b/rpython/rlib/rbigint.py @@ -2817,6 +2817,8

[pypy-commit] pypy default: slightly better test

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81574:bf5ba4797872 Date: 2016-01-05 12:09 +0100 http://bitbucket.org/pypy/pypy/changeset/bf5ba4797872/ Log:slightly better test diff --git a/pypy/objspace/std/test/test_longobject.py b/pypy/objspace/std/test/test_longobject.py --- a/pypy/objspace/std/

[pypy-commit] pypy s390x-backend: added test_float from backend/test (passing)

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81573:f9318251e43f Date: 2016-01-05 12:02 +0100 http://bitbucket.org/pypy/pypy/changeset/f9318251e43f/ Log:added test_float from backend/test (passing) fixed an issue in cond_call, did not correctly pop register r2 from the ji

[pypy-commit] pypy default: CPython has a special case for ``long("string", power-of-two-base)`` to

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81572:ef530201647c Date: 2016-01-05 11:58 +0100 http://bitbucket.org/pypy/pypy/changeset/ef530201647c/ Log:CPython has a special case for ``long("string", power-of-two-base)`` to avoid quadratic time. It is used by pickling, notably. diff --git

[pypy-commit] pypy s390x-backend: added more failing tests for the pool, filling the literal pool after the trace list has been rewritten (did not switch the order for bridges, fixes more tests)

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81571:38d3cd409efc Date: 2016-01-05 10:35 +0100 http://bitbucket.org/pypy/pypy/changeset/38d3cd409efc/ Log:added more failing tests for the pool, filling the literal pool after the trace list has been rewritten (did not switch

[pypy-commit] pypy default: Typo (thanks Vincent)

2016-01-05 Thread arigo
Author: Armin Rigo Branch: Changeset: r81570:06434f97e9c6 Date: 2016-01-05 10:06 +0100 http://bitbucket.org/pypy/pypy/changeset/06434f97e9c6/ Log:Typo (thanks Vincent) diff --git a/pypy/module/posix/interp_posix.py b/pypy/module/posix/interp_posix.py --- a/pypy/module/posix/interp_posix.py

[pypy-commit] pypy s390x-backend: removed debug statements, switched arguments while calling frame realloc and added a test for the pool

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81569:62baaa8ea669 Date: 2016-01-05 09:55 +0100 http://bitbucket.org/pypy/pypy/changeset/62baaa8ea669/ Log:removed debug statements, switched arguments while calling frame realloc and added a test for the pool diff --git a/rp

[pypy-commit] pypy ec-keepalive: After fork(), at least in the __thread case, we need to be careful and

2016-01-05 Thread arigo
Author: Armin Rigo Branch: ec-keepalive Changeset: r81568:18bd10183487 Date: 2016-01-05 08:39 + http://bitbucket.org/pypy/pypy/changeset/18bd10183487/ Log:After fork(), at least in the __thread case, we need to be careful and reinitialize the doubly-linked list. Otherwise, it poin

[pypy-commit] pypy s390x-backend: wow, how could frame regalloc even work? passing arguments in the right registers now

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81567:b5700c1e1b20 Date: 2016-01-05 08:59 +0100 http://bitbucket.org/pypy/pypy/changeset/b5700c1e1b20/ Log:wow, how could frame regalloc even work? passing arguments in the right registers now diff --git a/rpython/jit/backend