Author: Armin Rigo <ar...@tunes.org> Branch: Changeset: r74741:af4cfbb2548c Date: 2014-11-26 22:27 +0100 http://bitbucket.org/pypy/pypy/changeset/af4cfbb2548c/
Log: Wrong instruction. diff --git a/rpython/jit/backend/arm/codebuilder.py b/rpython/jit/backend/arm/codebuilder.py --- a/rpython/jit/backend/arm/codebuilder.py +++ b/rpython/jit/backend/arm/codebuilder.py @@ -324,9 +324,9 @@ | (rd & 0xF) << 12 | (rm & 0xF)) - def SXTB16_rr(self, rd, rm, c=cond.AL): + def SXTH_rr(self, rd, rm, c=cond.AL): self.write32(c << 28 - | 0x068F0070 + | 0x06BF0070 | (rd & 0xF) << 12 | (rm & 0xF)) diff --git a/rpython/jit/backend/arm/opassembler.py b/rpython/jit/backend/arm/opassembler.py --- a/rpython/jit/backend/arm/opassembler.py +++ b/rpython/jit/backend/arm/opassembler.py @@ -108,7 +108,7 @@ if numbytes.value == 1: self.mc.SXTB_rr(res.value, arg.value) elif numbytes.value == 2: - self.mc.SXTB16_rr(res.value, arg.value) + self.mc.SXTH_rr(res.value, arg.value) else: raise AssertionError("bad number of bytes") return fcond _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit