Author: Armin Rigo <ar...@tunes.org>
Branch:
Changeset: r97144:381752e5cd15
Date: 2019-08-11 14:06 +0000
http://bitbucket.org/pypy/pypy/changeset/381752e5cd15/
Log: aarch64: fix test_gc_integration.py
diff --git a/rpython/jit/backend/aarch64/assembler.py
b/rpython/jit/backend/aarch64/assembler.py
--- a/rpython/jit/backend/aarch64/assembler.py
+++ b/rpython/jit/backend/aarch64/assembler.py
@@ -31,6 +31,7 @@
ResOpAssembler.__init__(self, cpu, translate_support_code)
self.failure_recovery_code = [0, 0, 0, 0]
self.wb_slowpath = [0, 0, 0, 0, 0]
+ self.stack_check_slowpath = 0
def assemble_loop(self, jd_id, unique_id, logger, loopname, inputargs,
operations, looptoken, log):
@@ -675,7 +676,7 @@
# new value of nursery_free_adr in r1 and the adr of the new object in
# r0.
- self.mc.B_ofs_cond(10 * 4, c.LO) # 4 for gcmap load, 5 for BL, 1 for
B_ofs_cond
+ self.mc.B_ofs_cond(10 * 4, c.LS) # 4 for gcmap load, 5 for BL, 1 for
B_ofs_cond
self.mc.gen_load_int_full(r.ip1.value, rffi.cast(lltype.Signed, gcmap))
self.mc.BL(self.malloc_slowpath)
@@ -698,7 +699,7 @@
self.mc.CMP_rr(r.x1.value, r.ip0.value)
#
- self.mc.B_ofs_cond(40, c.LO) # see calculations in malloc_cond
+ self.mc.B_ofs_cond(40, c.LS) # see calculations in malloc_cond
self.mc.gen_load_int_full(r.ip1.value, rffi.cast(lltype.Signed, gcmap))
self.mc.BL(self.malloc_slowpath)
diff --git a/rpython/jit/backend/llsupport/test/test_gc_integration.py
b/rpython/jit/backend/llsupport/test/test_gc_integration.py
--- a/rpython/jit/backend/llsupport/test/test_gc_integration.py
+++ b/rpython/jit/backend/llsupport/test/test_gc_integration.py
@@ -93,6 +93,8 @@
assert nos == [0, 1, 33]
elif self.cpu.backend_name.startswith('zarch'):
assert nos == [0, 1, 29]
+ elif self.cpu.backend_name.startswith('aarch64'):
+ assert nos == [0, 1, 27]
else:
raise Exception("write the data here")
assert frame.jf_frame[nos[0]]
@@ -672,6 +674,8 @@
elif self.cpu.backend_name.startswith('zarch'):
# 10 gpr, 14 fpr -> 25 is the first slot
assert gcmap == [26, 27, 28]
+ elif self.cpu.backend_name.startswith('aarch64'):
+ assert gcmap == [24, 25, 26]
elif self.cpu.IS_64_BIT:
assert gcmap == [28, 29, 30]
elif self.cpu.backend_name.startswith('arm'):
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