Author: Sven Hager <hager.s...@googlemail.com>
Branch: ppc-jit-backend-rpythonization
Changeset: r52231:9da8efc953d9
Date: 2012-02-08 14:51 +0100
http://bitbucket.org/pypy/pypy/changeset/9da8efc953d9/

Log:    merge

diff --git a/pypy/jit/backend/ppc/arch.py b/pypy/jit/backend/ppc/arch.py
--- a/pypy/jit/backend/ppc/arch.py
+++ b/pypy/jit/backend/ppc/arch.py
@@ -1,8 +1,8 @@
 # Constants that depend on whether we are on 32-bit or 64-bit
 
 from pypy.jit.backend.ppc.register import (NONVOLATILES,
-                                                  NONVOLATILES_FLOAT,
-                                                  MANAGED_REGS)
+                                           NONVOLATILES_FLOAT,
+                                           MANAGED_REGS)
 
 import sys
 if sys.maxint == (2**31 - 1):
diff --git a/pypy/jit/backend/ppc/locations.py 
b/pypy/jit/backend/ppc/locations.py
--- a/pypy/jit/backend/ppc/locations.py
+++ b/pypy/jit/backend/ppc/locations.py
@@ -110,7 +110,4 @@
     return ImmLocation(val)
 
 def get_spp_offset(pos):
-    if pos < 0:
-        return -pos * WORD
-    else:
-        return -(pos + 1) * WORD
+    return -(pos + 1) * WORD
diff --git a/pypy/jit/backend/ppc/ppc_assembler.py 
b/pypy/jit/backend/ppc/ppc_assembler.py
--- a/pypy/jit/backend/ppc/ppc_assembler.py
+++ b/pypy/jit/backend/ppc/ppc_assembler.py
@@ -16,9 +16,9 @@
                                               FLOAT_INT_CONVERSION, 
FORCE_INDEX,
                                               SIZE_LOAD_IMM_PATCH_SP)
 from pypy.jit.backend.ppc.helper.assembler import (gen_emit_cmp_op, 
-                                                          encode32, encode64,
-                                                          decode32, decode64,
-                                                          count_reg_args,
+                                                   encode32, encode64,
+                                                   decode32, decode64,
+                                                   count_reg_args,
                                                           Saved_Volatiles)
 import pypy.jit.backend.ppc.register as r
 import pypy.jit.backend.ppc.condition as c
diff --git a/pypy/jit/backend/ppc/register.py b/pypy/jit/backend/ppc/register.py
--- a/pypy/jit/backend/ppc/register.py
+++ b/pypy/jit/backend/ppc/register.py
@@ -1,5 +1,5 @@
 from pypy.jit.backend.ppc.locations import (RegisterLocation,
-                                                   FPRegisterLocation)
+                                            FPRegisterLocation)
 
 ALL_REGS        = [RegisterLocation(i) for i in range(32)]
 ALL_FLOAT_REGS  = [FPRegisterLocation(i) for i in range(32)]
diff --git a/pypy/jit/backend/ppc/runner.py b/pypy/jit/backend/ppc/runner.py
--- a/pypy/jit/backend/ppc/runner.py
+++ b/pypy/jit/backend/ppc/runner.py
@@ -44,7 +44,7 @@
     def setup_once(self):
         self.asm.setup_once()
 
-    def compile_loop(self, inputargs, operations, looptoken, log=False, 
name=""):
+    def compile_loop(self, inputargs, operations, looptoken, log=True, 
name=""):
         self.asm.assemble_loop(inputargs, operations, looptoken, log)
 
     def compile_bridge(self, faildescr, inputargs, operations, 
diff --git a/pypy/jit/backend/ppc/test/support.py 
b/pypy/jit/backend/ppc/test/support.py
new file mode 100644
--- /dev/null
+++ b/pypy/jit/backend/ppc/test/support.py
@@ -0,0 +1,9 @@
+from pypy.jit.backend.detect_cpu import getcpuclass
+from pypy.jit.metainterp.test import support
+
+class JitPPCMixin(support.LLJitMixin):
+    type_system = 'lltype'
+    CPUClass = getcpuclass()
+
+    def check_jumps(self, maxcount):
+        pass
diff --git a/pypy/jit/backend/ppc/test/test_form.py 
b/pypy/jit/backend/ppc/test/test_form.py
--- a/pypy/jit/backend/ppc/test/test_form.py
+++ b/pypy/jit/backend/ppc/test/test_form.py
@@ -1,11 +1,11 @@
 import autopath
-from pypy.jit.backend.ppc.ppcgen.ppc_assembler import b
+from pypy.jit.backend.ppc.ppc_assembler import b
 import random
 import sys
 
-from pypy.jit.backend.ppc.ppcgen.form import Form, FormException
-from pypy.jit.backend.ppc.ppcgen.field import Field
-from pypy.jit.backend.ppc.ppcgen.assembler import Assembler
+from pypy.jit.backend.ppc.form import Form, FormException
+from pypy.jit.backend.ppc.field import Field
+from pypy.jit.backend.ppc.assembler import Assembler
 
 # 0                              31
 # +-------------------------------+
diff --git a/pypy/jit/backend/ppc/test/test_list.py 
b/pypy/jit/backend/ppc/test/test_list.py
new file mode 100644
--- /dev/null
+++ b/pypy/jit/backend/ppc/test/test_list.py
@@ -0,0 +1,8 @@
+
+from pypy.jit.metainterp.test.test_list import ListTests
+from pypy.jit.backend.ppc.test.support import JitPPCMixin
+
+class TestList(JitPPCMixin, ListTests):
+    # for individual tests see
+    # ====> ../../../metainterp/test/test_list.py
+    pass
diff --git a/pypy/jit/backend/ppc/test/test_rassemblermaker.py 
b/pypy/jit/backend/ppc/test/test_rassemblermaker.py
--- a/pypy/jit/backend/ppc/test/test_rassemblermaker.py
+++ b/pypy/jit/backend/ppc/test/test_rassemblermaker.py
@@ -1,5 +1,5 @@
-from pypy.jit.backend.ppc.ppcgen.rassemblermaker import make_rassembler
-from pypy.jit.backend.ppc.ppcgen.ppc_assembler import PPCAssembler
+from pypy.jit.backend.ppc.rassemblermaker import make_rassembler
+from pypy.jit.backend.ppc.ppc_assembler import PPCAssembler
 
 RPPCAssembler = make_rassembler(PPCAssembler)
 
diff --git a/pypy/jit/backend/ppc/test/test_regalloc.py 
b/pypy/jit/backend/ppc/test/test_regalloc.py
--- a/pypy/jit/backend/ppc/test/test_regalloc.py
+++ b/pypy/jit/backend/ppc/test/test_regalloc.py
@@ -1,10 +1,11 @@
 from pypy.rlib.objectmodel import instantiate
-from pypy.jit.backend.ppc.ppcgen.locations import (imm, RegisterLocation,
-                                                   ImmLocation, StackLocation)
-from pypy.jit.backend.ppc.ppcgen.register import *
-from pypy.jit.backend.ppc.ppcgen.codebuilder import hi, lo
-from pypy.jit.backend.ppc.ppcgen.ppc_assembler import AssemblerPPC
-from pypy.jit.backend.ppc.ppcgen.arch import WORD
+from pypy.jit.backend.ppc.locations import (imm, RegisterLocation,
+                                            ImmLocation, StackLocation)
+from pypy.jit.backend.ppc.register import *
+from pypy.jit.backend.ppc.codebuilder import hi, lo
+from pypy.jit.backend.ppc.ppc_assembler import AssemblerPPC
+from pypy.jit.backend.ppc.arch import WORD
+from pypy.jit.backend.ppc.locations import get_spp_offset
 
 class MockBuilder(object):
     
@@ -94,23 +95,31 @@
         big = 2 << 28
         self.asm.regalloc_mov(imm(big), stack(7))
 
-        exp_instr = [MI("load_imm", 0, 5),
-                     MI("stw", r0.value, SPP.value, -(6 * WORD + WORD)),
-                     MI("load_imm", 0, big),
-                     MI("stw", r0.value, SPP.value, -(7 * WORD + WORD))]
+        exp_instr = [MI("alloc_scratch_reg"),
+                     MI("load_imm", r0, 5),
+                     MI("store", r0.value, SPP.value, get_spp_offset(6)),
+                     MI("free_scratch_reg"),
+
+                     MI("alloc_scratch_reg"),
+                     MI("load_imm", r0, big),
+                     MI("store", r0.value, SPP.value, get_spp_offset(7)),
+                     MI("free_scratch_reg")]
         assert self.asm.mc.instrs == exp_instr
 
     def test_mem_to_reg(self):
         self.asm.regalloc_mov(stack(5), reg(10))
         self.asm.regalloc_mov(stack(0), reg(0))
-        exp_instrs = [MI("lwz", r10.value, SPP.value, -(5 * WORD + WORD)),
-                      MI("lwz", r0.value, SPP.value, -(WORD))]
+        exp_instrs = [MI("load", r10.value, SPP.value, -(5 * WORD + WORD)),
+                      MI("load", r0.value, SPP.value, -(WORD))]
         assert self.asm.mc.instrs == exp_instrs
 
     def test_mem_to_mem(self):
         self.asm.regalloc_mov(stack(5), stack(6))
-        exp_instrs = [MI("lwz", r0.value, SPP.value, -(5 * WORD + WORD)),
-                      MI("stw", r0.value, SPP.value, -(6 * WORD + WORD))]
+        exp_instrs = [
+                      MI("alloc_scratch_reg"),
+                      MI("load", r0.value, SPP.value, get_spp_offset(5)),
+                      MI("store", r0.value, SPP.value, get_spp_offset(6)),
+                      MI("free_scratch_reg")]
         assert self.asm.mc.instrs == exp_instrs
 
     def test_reg_to_reg(self):
@@ -123,8 +132,8 @@
     def test_reg_to_mem(self):
         self.asm.regalloc_mov(reg(5), stack(10))
         self.asm.regalloc_mov(reg(0), stack(2))
-        exp_instrs = [MI("stw", r5.value, SPP.value, -(10 * WORD + WORD)),
-                      MI("stw", r0.value, SPP.value, -(2 * WORD + WORD))]
+        exp_instrs = [MI("store", r5.value, SPP.value, -(10 * WORD + WORD)),
+                      MI("store", r0.value, SPP.value, -(2 * WORD + WORD))]
         assert self.asm.mc.instrs == exp_instrs
 
 def reg(i):
diff --git a/pypy/jit/backend/ppc/test/test_ztranslation.py 
b/pypy/jit/backend/ppc/test/test_ztranslation.py
--- a/pypy/jit/backend/ppc/test/test_ztranslation.py
+++ b/pypy/jit/backend/ppc/test/test_ztranslation.py
@@ -8,7 +8,7 @@
 from pypy.jit.backend.test.support import CCompiledMixin
 from pypy.jit.codewriter.policy import StopAtXPolicy
 from pypy.translator.translator import TranslationContext
-from pypy.jit.backend.ppc.ppcgen.arch import IS_PPC_32, IS_PPC_64
+from pypy.jit.backend.ppc.arch import IS_PPC_32, IS_PPC_64
 from pypy.config.translationoption import DEFL_GC
 from pypy.rlib import rgc
 
diff --git a/pypy/jit/backend/ppc/util.py b/pypy/jit/backend/ppc/util.py
new file mode 100644
--- /dev/null
+++ b/pypy/jit/backend/ppc/util.py
@@ -0,0 +1,23 @@
+from pypy.jit.codegen.ppc.ppc_assembler import MyPPCAssembler
+from pypy.jit.codegen.ppc.func_builder import make_func
+
+from regname import *
+
+def access_at():
+    a = MyPPCAssembler()
+
+    a.lwzx(r3, r3, r4)
+    a.blr()
+
+    return make_func(a, "i", "ii")
+
+access_at = access_at()
+
+def itoO():
+    a = MyPPCAssembler()
+
+    a.blr()
+
+    return make_func(a, "O", "i")
+
+itoO = itoO()
diff --git a/pypy/jit/backend/test/runner_test.py 
b/pypy/jit/backend/test/runner_test.py
--- a/pypy/jit/backend/test/runner_test.py
+++ b/pypy/jit/backend/test/runner_test.py
@@ -3233,6 +3233,24 @@
                          'float', descr=calldescr)
             assert res.getfloat() == expected
 
+    def test_wrong_guard_nonnull_class(self):
+        t_box, T_box = self.alloc_instance(self.T)
+        null_box = self.null_instance()
+        faildescr = BasicFailDescr(42)
+        operations = [
+            ResOperation(rop.GUARD_NONNULL_CLASS, [t_box, T_box], None,
+                                                        descr=faildescr),
+            ResOperation(rop.FINISH, [], None, descr=BasicFailDescr(1))]
+        operations[0].setfailargs([])
+        looptoken = JitCellToken()
+        inputargs = [t_box]
+        self.cpu.compile_loop(inputargs, operations, looptoken)
+        operations = [
+            ResOperation(rop.FINISH, [], None, descr=BasicFailDescr(99))
+        ]
+        self.cpu.compile_bridge(faildescr, [], operations, looptoken)
+        fail = self.cpu.execute_token(looptoken, null_box.getref_base())
+        assert fail.identifier == 99
 
     def test_compile_loop_with_target(self):
         i0 = BoxInt()
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