Author: Richard Plangger <planri...@gmail.com>
Branch: s390x-backend
Changeset: r80630:a45f6bccf61b
Date: 2015-11-05 11:27 +0100
http://bitbucket.org/pypy/pypy/changeset/a45f6bccf61b/
Log: freed r12 of its burden as a base pointer, saving the pool address
(it is known when jumping to a label) to the bridge pool instead of
on the stack
diff --git a/rpython/jit/backend/zarch/arch.py
b/rpython/jit/backend/zarch/arch.py
--- a/rpython/jit/backend/zarch/arch.py
+++ b/rpython/jit/backend/zarch/arch.py
@@ -17,7 +17,6 @@
GPR_STACK_SAVE_IN_BYTES = 120
STD_FRAME_SIZE_IN_BYTES = 140
-BSP_STACK_OFFSET = 128
THREADLOCAL_ADDR_OFFSET = 8
assert STD_FRAME_SIZE_IN_BYTES % 2 == 0
@@ -63,3 +62,6 @@
RECOVERY_TARGET_POOL_OFFSET = 0
RECOVERY_GCMAP_POOL_OFFSET = 8
+
+JUMPABS_TARGET_ADDR__POOL_OFFSET = 0
+JUMPABS_POOL_ADDR_POOL_OFFSET = 8
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -12,7 +12,8 @@
from rpython.jit.backend.zarch.arch import (WORD,
STD_FRAME_SIZE_IN_BYTES, GPR_STACK_SAVE_IN_BYTES,
THREADLOCAL_ADDR_OFFSET, RECOVERY_GCMAP_POOL_OFFSET,
- RECOVERY_TARGET_POOL_OFFSET)
+ RECOVERY_TARGET_POOL_OFFSET, JUMPABS_TARGET_ADDR__POOL_OFFSET,
+ JUMPABS_POOL_ADDR_POOL_OFFSET)
from rpython.jit.backend.zarch.opassembler import (IntOpAssembler,
FloatOpAssembler, GuardOpAssembler)
from rpython.jit.backend.zarch.regalloc import Regalloc
@@ -352,6 +353,7 @@
def fixup_target_tokens(self, rawstart):
for targettoken in self.target_tokens_currently_compiling:
targettoken._ll_loop_code += rawstart
+ targettoken._ll_loop_pool += rawstart
self.target_tokens_currently_compiling = None
def _assemble(self, regalloc, inputargs, operations):
@@ -516,7 +518,6 @@
# Build a new stackframe of size STD_FRAME_SIZE_IN_BYTES
self.mc.STMG(r.r6, r.r15, l.addr(-GPR_STACK_SAVE_IN_BYTES, r.SP))
self.mc.AGHI(r.SP, l.imm(-STD_FRAME_SIZE_IN_BYTES))
- self.mc.LGR(r.BSP, r.SP)
# save r4, the second argument, to THREADLOCAL_ADDR_OFFSET
#self.mc.STG(r.r3, l.addr(THREADLOCAL_ADDR_OFFSET, r.SP))
@@ -578,13 +579,16 @@
self.mc.b_offset(descr._ll_loop_code)
else:
# restore the pool address
- offset = self.pool.get_descr_offset(descr)
+ offset = self.pool.get_descr_offset(descr) + \
+ JUMPABS_TARGET_ADDR__POOL_OFFSET
+ offset_pool = offset + JUMPABS_POOL_ADDR_POOL_OFFSET
self.mc.LG(r.SCRATCH, l.pool(offset))
- self.mc.LG(r.POOL, l.addr(0, r.BSP))
- self.mc.AGHI(r.BSP, l.imm(8))
+ # the pool address of the target is saved in the bridge's pool
+ self.mc.LG(r.POOL, l.pool(offset_pool))
self.mc.BCR(c.ANY, r.SCRATCH)
- print "writing", hex(descr._ll_loop_code)
+
self.pool.overwrite_64(self.mc, offset, descr._ll_loop_code)
+ self.pool.overwrite_64(self.mc, offset_pool, descr._ll_loop_pool)
def emit_finish(self, op, arglocs, regalloc):
diff --git a/rpython/jit/backend/zarch/pool.py
b/rpython/jit/backend/zarch/pool.py
--- a/rpython/jit/backend/zarch/pool.py
+++ b/rpython/jit/backend/zarch/pool.py
@@ -27,12 +27,12 @@
if descr not in asm.target_tokens_currently_compiling:
# this is a 'long' jump instead of a relative jump
self.offset_map[descr] = self.size
- self.reserve_literal(8)
+ self.reserve_literal(16)
elif op.getopnum() == rop.LABEL:
descr = op.getdescr()
+ descr._ll_loop_pool = self.pool_start
if descr not in asm.target_tokens_currently_compiling:
# this is a 'long' jump instead of a relative jump
- descr._ll_loop_code = self.pool_start
self.offset_map[descr] = self.size
for arg in op.getarglist():
if arg.is_constant():
@@ -68,6 +68,8 @@
# the current solution (gcc does the same), use a literal pool
# located at register r13. This one can easily offset with 20
# bit signed values (should be enough)
+ self.pool_start = asm.mc.get_relative_pos() + \
+ asm.mc.BRAS_byte_count
for op in operations:
self.ensure_can_hold_constants(asm, op)
if self.size == 0:
@@ -78,14 +80,8 @@
# self.size += 1
jump_offset = self.size+asm.mc.BRAS_byte_count
assert jump_offset < 2**15-1
- if bridge:
- asm.mc.LGR(r.SCRATCH, r.POOL)
asm.mc.BRAS(r.POOL, l.imm(jump_offset))
- self.pool_start = asm.mc.get_relative_pos()
asm.mc.write('\xFF' * self.size)
- if bridge:
- asm.mc.STG(r.SCRATCH, l.addr(-8, r.BSP))
- asm.mc.AGHI(r.BSP, l.imm(-8))
print "pool with %d quad words" % (self.size // 8)
def overwrite_64(self, mc, index, value):
diff --git a/rpython/jit/backend/zarch/registers.py
b/rpython/jit/backend/zarch/registers.py
--- a/rpython/jit/backend/zarch/registers.py
+++ b/rpython/jit/backend/zarch/registers.py
@@ -7,10 +7,9 @@
[r0,r1,r2,r3,r4,r5,r6,r7,r8,
r9,r10,r11,r12,r13,r14,r15] = registers
-MANAGED_REGS = [r0,r1,r4,r5,r6,r7,r8,r9,r10]
-VOLATILES = [r6,r7,r8,r9,r10]
+MANAGED_REGS = [r0,r1,r4,r5,r6,r7,r8,r9,r10,r12]
+VOLATILES = [r6,r7,r8,r9,r10,r12]
SP = r15
-BSP = r12
RETURN = r14
POOL = r13
SPP = r11
_______________________________________________
pypy-commit mailing list
pypy-commit@python.org
https://mail.python.org/mailman/listinfo/pypy-commit
