Author: Armin Rigo
Branch: branch-prediction
Changeset: r91014:a47cbc896847
Date: 2017-04-07 13:24 +0200
http://bitbucket.org/pypy/pypy/changeset/a47cbc896847/
Log:Fix WriteBarrierSlowPath. Add ReacqGilSlowPath.
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/ass
Author: Armin Rigo
Branch: branch-prediction
Changeset: r91015:b3337c98a745
Date: 2017-04-07 14:54 +0200
http://bitbucket.org/pypy/pypy/changeset/b3337c98a745/
Log:Fix: can't use assembler._regalloc: the current state of the
register allocation is different (actually None)!
diff --gi
Author: Armin Rigo
Branch: branch-prediction
Changeset: r91016:1af5108d7af4
Date: 2017-04-07 16:13 +0200
http://bitbucket.org/pypy/pypy/changeset/1af5108d7af4/
Log:fix test
diff --git a/rpython/jit/backend/x86/test/test_runner.py
b/rpython/jit/backend/x86/test/test_runner.py
--- a/rpython/j
Author: Armin Rigo
Branch:
Changeset: r91018:16bac2ad5e92
Date: 2017-04-07 16:33 +0200
http://bitbucket.org/pypy/pypy/changeset/16bac2ad5e92/
Log:hg merge branch-prediction
Help the branch predictor on x86 CPUs. Our JIT-generated machine
code is a single long basic block, an
Author: Armin Rigo
Branch:
Changeset: r91019:545406083429
Date: 2017-04-07 16:34 +0200
http://bitbucket.org/pypy/pypy/changeset/545406083429/
Log:document branch-prediction
diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst
--- a/pypy/doc/whatsnew-head.rst
+++ b/pypy/doc/w
Author: Armin Rigo
Branch: branch-prediction
Changeset: r91017:46e70fda3f39
Date: 2017-04-07 16:30 +0200
http://bitbucket.org/pypy/pypy/changeset/46e70fda3f39/
Log:Close branch, ready to merge
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