[pypy-commit] pypy vecopt-merge: translation issue (missing import)

2015-10-02 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79932:31753dc0d45d Date: 2015-10-02 15:27 +0200 http://bitbucket.org/pypy/pypy/changeset/31753dc0d45d/ Log:translation issue (missing import) diff --git a/rpython/jit/metainterp/optimizeopt/schedule.py

[pypy-commit] pypy vecopt-merge: same operation for iter states failed if index and _indices where not the same (fixed)

2015-10-02 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79929:232d93b7d261 Date: 2015-10-02 13:10 +0200 http://bitbucket.org/pypy/pypy/changeset/232d93b7d261/ Log:same operation for iter states failed if index and _indices where not the same (fixed) concrete

[pypy-commit] pypy vecopt-merge: test_micronumpy used old --jit "vectorize" parameter

2015-10-03 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79938:2751e3b80936 Date: 2015-10-03 08:32 +0200 http://bitbucket.org/pypy/pypy/changeset/2751e3b80936/ Log:test_micronumpy used old --jit "vectorize" parameter diff --git

[pypy-commit] pypy vecopt-merge: some minor reverts from defaults

2015-09-30 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79906:bec18388a99b Date: 2015-09-30 15:42 +0200 http://bitbucket.org/pypy/pypy/changeset/bec18388a99b/ Log:some minor reverts from defaults diff --git a/rpython/jit/backend/llsupport/test/test_descr.py

[pypy-commit] pypy vecopt-merge: forgot to cache the descr when concrete type is set, some minor changes reverted

2015-09-30 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79905:190de8806c18 Date: 2015-09-30 15:31 +0200 http://bitbucket.org/pypy/pypy/changeset/190de8806c18/ Log:forgot to cache the descr when concrete type is set, some minor changes reverted diff --git

[pypy-commit] pypy vecopt-merge: reverted some changes that are not necessary for the branch

2015-09-30 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79907:fe486d25512c Date: 2015-09-30 15:53 +0200 http://bitbucket.org/pypy/pypy/changeset/fe486d25512c/ Log:reverted some changes that are not necessary for the branch diff --git a/pypy/module/micronumpy/ufuncs.py

[pypy-commit] pypy vecopt-merge: pushing forward test_zjit on llgraph

2015-09-28 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79881:8a8e13743c1e Date: 2015-09-28 15:09 +0200 http://bitbucket.org/pypy/pypy/changeset/8a8e13743c1e/ Log:pushing forward test_zjit on llgraph diff --git a/pypy/module/micronumpy/test/test_zjit.py

[pypy-commit] pypy vecopt-merge: only one test for llgraph failing

2015-09-24 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79808:ed1cb45ccbd1 Date: 2015-09-24 12:53 +0200 http://bitbucket.org/pypy/pypy/changeset/ed1cb45ccbd1/ Log:only one test for llgraph failing diff --git a/rpython/jit/backend/llgraph/runner.py

[pypy-commit] pypy vecopt-merge: llgraph working again

2015-09-24 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79810:f1468a7d8892 Date: 2015-09-24 15:34 +0200 http://bitbucket.org/pypy/pypy/changeset/f1468a7d8892/ Log:llgraph working again diff --git a/rpython/jit/metainterp/optimizeopt/guard.py

[pypy-commit] pypy vecopt-merge: x86 assembler half way through, accumulation leaves behind an fail descr that is tried to be stiched (but removed from the trace)

2015-09-24 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79812:fd39e085206b Date: 2015-09-24 17:50 +0200 http://bitbucket.org/pypy/pypy/changeset/fd39e085206b/ Log:x86 assembler half way through, accumulation leaves behind an fail descr that is tried to be

[pypy-commit] pypy vecopt-merge: removes the unused faildescr from the versioned loop info

2015-09-24 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79813:5fa27b9b5c0c Date: 2015-09-24 18:33 +0200 http://bitbucket.org/pypy/pypy/changeset/5fa27b9b5c0c/ Log:removes the unused faildescr from the versioned loop info diff --git

[pypy-commit] pypy vecopt-merge: some translation issues indicated by test_zjit

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79843:658ed0c0b405 Date: 2015-09-25 20:49 +0200 http://bitbucket.org/pypy/pypy/changeset/658ed0c0b405/ Log:some translation issues indicated by test_zjit diff --git a/pypy/module/micronumpy/test/test_zjit.py

[pypy-commit] pypy vecopt-merge: parameter missing here, return value there, ... translation issues :)

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79844:2002cf4fb7d3 Date: 2015-09-25 21:09 +0200 http://bitbucket.org/pypy/pypy/changeset/2002cf4fb7d3/ Log:parameter missing here, return value there, ... translation issues :) diff --git

[pypy-commit] pypy vecopt-merge: datatype is not set if input does not define a datatype

2015-09-21 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79739:bcfb21ad79c8 Date: 2015-09-21 15:11 +0200 http://bitbucket.org/pypy/pypy/changeset/bcfb21ad79c8/ Log:datatype is not set if input does not define a datatype diff --git

[pypy-commit] pypy vecopt-merge: guard.py tests passing again

2015-09-21 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79738:275b9b40d178 Date: 2015-09-21 14:59 +0200 http://bitbucket.org/pypy/pypy/changeset/275b9b40d178/ Log:guard.py tests passing again diff --git a/rpython/jit/metainterp/optimizeopt/guard.py

[pypy-commit] pypy vecopt-merge: half of the llgraph tests pass again, need to push through the rest of the unported stuff and tweaking the thing here and there

2015-09-22 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79769:9169c6da92d4 Date: 2015-09-22 17:09 +0200 http://bitbucket.org/pypy/pypy/changeset/9169c6da92d4/ Log:half of the llgraph tests pass again, need to push through the rest of the unported stuff and

[pypy-commit] pypy vecopt-merge: (integration tests) six of them still failing, but the rest is working

2015-09-18 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79687:6877dfe0b4c0 Date: 2015-09-18 16:07 +0200 http://bitbucket.org/pypy/pypy/changeset/6877dfe0b4c0/ Log:(integration tests) six of them still failing, but the rest is working diff --git

[pypy-commit] pypy vecopt-merge: all optimizeopt tests pass again

2015-09-21 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79742:abfd8bc5e489 Date: 2015-09-21 20:02 +0200 http://bitbucket.org/pypy/pypy/changeset/abfd8bc5e489/ Log:all optimizeopt tests pass again diff --git a/rpython/jit/backend/llgraph/runner.py

[pypy-commit] pypy vecopt-merge: vecopt.py tests passing again, now let's finally head to the assembler

2015-09-21 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79737:664117c201a8 Date: 2015-09-21 11:40 +0200 http://bitbucket.org/pypy/pypy/changeset/664117c201a8/ Log:vecopt.py tests passing again, now let's finally head to the assembler diff --git

[pypy-commit] pypy vecopt-merge: 7 new test cases to check the guard_true/false assembler for vector parameters

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79818:fd5cdd7ddc3e Date: 2015-09-25 10:51 +0200 http://bitbucket.org/pypy/pypy/changeset/fd5cdd7ddc3e/ Log:7 new test cases to check the guard_true/false assembler for vector parameters diff --git

[pypy-commit] pypy vecopt-merge: wunderbar! x86 assembler works for all the test_x86vector tests

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79817:84a252c28c3b Date: 2015-09-25 09:23 +0200 http://bitbucket.org/pypy/pypy/changeset/84a252c28c3b/ Log:wunderbar! x86 assembler works for all the test_x86vector tests diff --git

[pypy-commit] pypy vecopt-merge: translation issues resolved, should compile now

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79823:a79a0fc8b3ea Date: 2015-09-25 15:43 +0200 http://bitbucket.org/pypy/pypy/changeset/a79a0fc8b3ea/ Log:translation issues resolved, should compile now diff --git a/rpython/jit/backend/x86/vector_ext.py

[pypy-commit] pypy vecopt-merge: checked for accidental removal of code, or failed merged lines

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79822:a856dc8ba36f Date: 2015-09-25 15:30 +0200 http://bitbucket.org/pypy/pypy/changeset/a856dc8ba36f/ Log:checked for accidental removal of code, or failed merged lines diff --git

[pypy-commit] pypy vecopt-merge: guard true/false for vectors work for the new test cases

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79821:b87eaf3540b3 Date: 2015-09-25 14:51 +0200 http://bitbucket.org/pypy/pypy/changeset/b87eaf3540b3/ Log:guard true/false for vectors work for the new test cases diff --git a/rpython/jit/backend/x86/regalloc.py

[pypy-commit] pypy vecopt-merge: added more types to the bool reduction tests, assembler going forward, but still not correct results

2015-09-25 Thread plan_rich
Author: Richard Plangger Branch: vecopt-merge Changeset: r79819:a7fd3e5a487c Date: 2015-09-25 12:13 +0200 http://bitbucket.org/pypy/pypy/changeset/a7fd3e5a487c/ Log:added more types to the bool reduction tests, assembler going forward, but still not correct

[pypy-commit] pypy s390x-backend: pushed forward cond_call_gc_wb, two more tests now passing

2015-12-17 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81365:9dfc528a3994 Date: 2015-12-17 11:26 +0100 http://bitbucket.org/pypy/pypy/changeset/9dfc528a3994/ Log:pushed forward cond_call_gc_wb, two more tests now passing diff --git

[pypy-commit] pypy s390x-backend: fixed issue with gc_store, constant was not pushed to literal pool (did not think that value could be constant)

2015-12-16 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81348:62b16757aa42 Date: 2015-12-16 15:57 +0100 http://bitbucket.org/pypy/pypy/changeset/62b16757aa42/ Log:fixed issue with gc_store, constant was not pushed to literal pool (did not think that value

[pypy-commit] pypy s390x-backend: added guard no exception, second cond_call now passing

2015-12-16 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81346:2d4a2bf50e28 Date: 2015-12-16 15:05 +0100 http://bitbucket.org/pypy/pypy/changeset/2d4a2bf50e28/ Log:added guard no exception, second cond_call now passing diff --git

[pypy-commit] pypy s390x-backend: copied stubs to assemble write barrier and exception path, pushed forward the assembly of cond_call_gc_wb (+array)

2015-12-16 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81347:a0e464a31d7f Date: 2015-12-16 15:48 +0100 http://bitbucket.org/pypy/pypy/changeset/a0e464a31d7f/ Log:copied stubs to assemble write barrier and exception path, pushed forward the assembly of

[pypy-commit] pypy s390x-backend: pair regalloc does not overwrite the variable binding anymore, but binds an the reigster to an additional parameter (e.g. the return value)

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81561:3c7888505b50 Date: 2016-01-04 21:38 +0100 http://bitbucket.org/pypy/pypy/changeset/3c7888505b50/ Log:pair regalloc does not overwrite the variable binding anymore, but binds an the reigster to an

[pypy-commit] extradoc extradoc: I'm comming too.

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: extradoc Changeset: r5590:051768591230 Date: 2016-01-04 20:31 +0100 http://bitbucket.org/pypy/extradoc/changeset/051768591230/ Log:I'm comming too. diff --git a/sprintinfo/leysin-winter-2016/people.txt

[pypy-commit] pypy s390x-backend: load_imm might emit different code load 32 or 64 bit imm, added this case to the regex of test_compile_asmlen

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81534:b2147c0cc9f7 Date: 2016-01-04 08:47 +0100 http://bitbucket.org/pypy/pypy/changeset/b2147c0cc9f7/ Log:load_imm might emit different code load 32 or 64 bit imm, added this case to the regex of

[pypy-commit] pypy s390x-backend: added test_basic & test_calling_conventions, the latter already passes

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81535:03d679053346 Date: 2016-01-04 09:06 +0100 http://bitbucket.org/pypy/pypy/changeset/03d679053346/ Log:added test_basic & test_calling_conventions, the latter already passes diff --git

[pypy-commit] pypy s390x-backend: missing files

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81536:cbc9bc98efec Date: 2016-01-04 09:15 +0100 http://bitbucket.org/pypy/pypy/changeset/cbc9bc98efec/ Log:missing files diff --git a/rpython/jit/backend/zarch/test/test_basic.py

[pypy-commit] extradoc extradoc: me -> to the people.txt list for the leysin sprint

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: extradoc Changeset: r5584:6e287dfcc4ab Date: 2016-01-04 13:33 +0100 http://bitbucket.org/pypy/extradoc/changeset/6e287dfcc4ab/ Log:me -> to the people.txt list for the leysin sprint diff --git a/sprintinfo/leysin-winter-2016/people.txt

[pypy-commit] extradoc extradoc: ups, did not read the line above, removed me from the list of prev. attendees

2016-01-04 Thread plan_rich
Author: Richard Plangger Branch: extradoc Changeset: r5585:75f174fab763 Date: 2016-01-04 13:37 +0100 http://bitbucket.org/pypy/extradoc/changeset/75f174fab763/ Log:ups, did not read the line above, removed me from the list of prev. attendees diff --git

[pypy-commit] pypy s390x-backend: removed debug statements, switched arguments while calling frame realloc and added a test for the pool

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81569:62baaa8ea669 Date: 2016-01-05 09:55 +0100 http://bitbucket.org/pypy/pypy/changeset/62baaa8ea669/ Log:removed debug statements, switched arguments while calling frame realloc and added a test for the

[pypy-commit] pypy s390x-backend: added more failing tests for the pool, filling the literal pool after the trace list has been rewritten (did not switch the order for bridges, fixes more tests)

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81571:38d3cd409efc Date: 2016-01-05 10:35 +0100 http://bitbucket.org/pypy/pypy/changeset/38d3cd409efc/ Log:added more failing tests for the pool, filling the literal pool after the trace list has been

[pypy-commit] pypy s390x-backend: implementing realloc frame

2015-12-31 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81505:35dcb2c4de31 Date: 2015-12-31 09:50 +0100 http://bitbucket.org/pypy/pypy/changeset/35dcb2c4de31/ Log:implementing realloc frame diff --git a/rpython/jit/backend/zarch/assembler.py

[pypy-commit] pypy s390x-backend: exchanged AGHI with LAY, same effect, but LAY does not change the condition code which is needed by the write barrier helper!

2016-01-02 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81526:b2f6253a910d Date: 2016-01-02 11:56 +0100 http://bitbucket.org/pypy/pypy/changeset/b2f6253a910d/ Log:exchanged AGHI with LAY, same effect, but LAY does not change the condition code which is needed

[pypy-commit] pypy s390x-backend: added some sanity checks, s390x only fails 4 (in test_runner)

2016-01-02 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81522:6d2f6b85c6e0 Date: 2016-01-02 10:48 +0100 http://bitbucket.org/pypy/pypy/changeset/6d2f6b85c6e0/ Log:added some sanity checks, s390x only fails 4 (in test_runner) diff --git

[pypy-commit] pypy s390x-backend: did not think of the following scenario: in a bridge you cannot 'just' use volatile registers as some might be allocated in the trace it is exiting (fixed)

2016-01-02 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81521:8184205817a7 Date: 2016-01-02 10:42 +0100 http://bitbucket.org/pypy/pypy/changeset/8184205817a7/ Log:did not think of the following scenario: in a bridge you cannot 'just' use volatile registers as

[pypy-commit] pypy s390x-backend: asmlen test failed, because more instructions in the entry of a bridge are now compiled (realloc check), seems about right what other backends implement!

2016-01-02 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81523:72ff734c842f Date: 2016-01-02 10:55 +0100 http://bitbucket.org/pypy/pypy/changeset/72ff734c842f/ Log:asmlen test failed, because more instructions in the entry of a bridge are now compiled (realloc

[pypy-commit] pypy s390x-backend: added save/restore exception impl

2015-12-29 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81492:4fbd38846596 Date: 2015-12-29 16:36 +0100 http://bitbucket.org/pypy/pypy/changeset/4fbd38846596/ Log:added save/restore exception impl diff --git a/rpython/jit/backend/zarch/assembler.py

[pypy-commit] pypy s390x-backend: added guard_exception to regalloc+assembler

2015-12-29 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81491:5670303748ca Date: 2015-12-29 15:07 +0100 http://bitbucket.org/pypy/pypy/changeset/5670303748ca/ Log:added guard_exception to regalloc+assembler diff --git a/rpython/jit/backend/test/runner_test.py

[pypy-commit] pypy s390x-backend: do not use a register that might be allocated in copy_content! added comment to clarify. test_string is now passing

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81587:481b32d406e5 Date: 2016-01-05 15:28 +0100 http://bitbucket.org/pypy/pypy/changeset/481b32d406e5/ Log:do not use a register that might be allocated in copy_content! added comment to clarify.

[pypy-commit] pypy s390x-backend: added test recursive, four tests to fix

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81588:f59c2e896924 Date: 2016-01-05 15:35 +0100 http://bitbucket.org/pypy/pypy/changeset/f59c2e896924/ Log:added test recursive, four tests to fix added raw memory tests (pass) diff --git

[pypy-commit] pypy s390x-backend: and yet some more tests: del, dict, exception and fficall

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81590:39602618dc34 Date: 2016-01-05 16:04 +0100 http://bitbucket.org/pypy/pypy/changeset/39602618dc34/ Log:and yet some more tests: del, dict, exception and fficall diff --git

[pypy-commit] pypy s390x-backend: added tests: loop_unroll, virtualizable, virtualref

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81589:15095a57b881 Date: 2016-01-05 15:49 +0100 http://bitbucket.org/pypy/pypy/changeset/15095a57b881/ Log:added tests: loop_unroll, virtualizable, virtualref diff --git

[pypy-commit] pypy s390x-backend: merged default

2016-01-06 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81599:b6d3c78012f2 Date: 2016-01-06 13:28 +0100 http://bitbucket.org/pypy/pypy/changeset/b6d3c78012f2/ Log:merged default added stubs for malloc nursery set the jf_descr and gcmap too early (in generate

[pypy-commit] pypy s390x-backend: removed debug statement, r2 is the return register on the s390x not r3

2016-01-06 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81601:6151e73da389 Date: 2016-01-06 14:52 +0100 http://bitbucket.org/pypy/pypy/changeset/6151e73da389/ Log:removed debug statement, r2 is the return register on the s390x not r3 diff --git

[pypy-commit] pypy memop-simplify3: syntax error removed, simplified op.getopnum() to opnum and extracting the field before

2016-01-07 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81609:258b49aa5c84 Date: 2016-01-07 13:11 +0100 http://bitbucket.org/pypy/pypy/changeset/258b49aa5c84/ Log:syntax error removed, simplified op.getopnum() to opnum and extracting the field before

[pypy-commit] pypy s390x-backend: need to save all registers before assembling call_release_gil*, accidentally put false to save_all_regs

2016-01-07 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81603:5d0c94086009 Date: 2016-01-07 09:27 +0100 http://bitbucket.org/pypy/pypy/changeset/5d0c94086009/ Log:need to save all registers before assembling call_release_gil*, accidentally put false to

[pypy-commit] pypy memop-simplify3: merged default

2016-01-07 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81608:6c7db6a22424 Date: 2016-01-07 12:14 +0100 http://bitbucket.org/pypy/pypy/changeset/6c7db6a22424/ Log:merged default diff too long, truncating to 2000 out of 2916 lines diff --git a/LICENSE b/LICENSE ---

[pypy-commit] pypy memop-simplify3: translation fixes for the changes in rewrite.py

2016-01-07 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81610:f99df61537a8 Date: 2016-01-07 14:57 +0100 http://bitbucket.org/pypy/pypy/changeset/f99df61537a8/ Log:translation fixes for the changes in rewrite.py diff --git a/rpython/jit/backend/llsupport/rewrite.py

[pypy-commit] pypy s390x-backend: malloc_cond_varsize impl

2016-01-08 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81616:068e8f6aa644 Date: 2016-01-08 09:05 +0100 http://bitbucket.org/pypy/pypy/changeset/068e8f6aa644/ Log:malloc_cond_varsize impl diff --git a/rpython/jit/backend/zarch/assembler.py

[pypy-commit] pypy s390x-backend: merged memop simplify (malloc_nursery_varsize updates)

2016-01-08 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81617:782f331d2e8b Date: 2016-01-08 09:09 +0100 http://bitbucket.org/pypy/pypy/changeset/782f331d2e8b/ Log:merged memop simplify (malloc_nursery_varsize updates) diff --git a/lib_pypy/cPickle.py

[pypy-commit] pypy s390x-backend: realloc frame is nearly working, it seems though the token is not different from the frame?

2015-12-31 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81506:25e9fedba6e8 Date: 2015-12-31 11:03 +0100 http://bitbucket.org/pypy/pypy/changeset/25e9fedba6e8/ Log:realloc frame is nearly working, it seems though the token is not different from the frame? diff

[pypy-commit] pypy s390x-backend: save/restore/reset exception is now working as expected by the test, overwrote value in a register that was passed to the vm

2015-12-30 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81502:afb077bff965 Date: 2015-12-30 16:51 +0100 http://bitbucket.org/pypy/pypy/changeset/afb077bff965/ Log:save/restore/reset exception is now working as expected by the test, overwrote value in a

[pypy-commit] pypy s390x-backend: BRC is not BCR!!

2015-12-30 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81504:0d5b4291c580 Date: 2015-12-30 17:47 +0100 http://bitbucket.org/pypy/pypy/changeset/0d5b4291c580/ Log:BRC is not BCR!! diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: added test_float from backend/test (passing)

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81573:f9318251e43f Date: 2016-01-05 12:02 +0100 http://bitbucket.org/pypy/pypy/changeset/f9318251e43f/ Log:added test_float from backend/test (passing) fixed an issue in cond_call, did not correctly pop

[pypy-commit] pypy s390x-backend: prevent the base loc register to be in pool

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81576:c137a0a35416 Date: 2016-01-05 13:15 +0100 http://bitbucket.org/pypy/pypy/changeset/c137a0a35416/ Log:prevent the base loc register to be in pool diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: int_lshift is a logical one, but up to now emitted an arithmetic shift, this makes the test_basic of the s390x fully passing!

2016-01-05 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81578:fec1779a7628 Date: 2016-01-05 13:50 +0100 http://bitbucket.org/pypy/pypy/changeset/fec1779a7628/ Log:int_lshift is a logical one, but up to now emitted an arithmetic shift, this makes the test_basic

[pypy-commit] pypy s390x-backend: fixed an edge case: s390x's native instruction for memset can return in the middle of the copy (determined by the cpu), added a loop to ensure all bytes are copied

2015-12-30 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81503:7288aa624ed6 Date: 2015-12-30 17:45 +0100 http://bitbucket.org/pypy/pypy/changeset/7288aa624ed6/ Log:fixed an edge case: s390x's native instruction for memset can return in the middle of the copy

[pypy-commit] pypy s390x-backend: adpating errno saving and restoring for call release gil, first part of the test passes

2015-12-22 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81421:ceb6d557fc88 Date: 2015-12-22 17:34 +0100 http://bitbucket.org/pypy/pypy/changeset/ceb6d557fc88/ Log:adpating errno saving and restoring for call release gil, first part of the test passes diff

[pypy-commit] pypy s390x-backend: added impl to call memcpy

2015-12-23 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81435:f8b4c491d659 Date: 2015-12-23 11:50 +0100 http://bitbucket.org/pypy/pypy/changeset/f8b4c491d659/ Log:added impl to call memcpy diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: finished memcpy call, adding stack frame to the routine correctly

2015-12-23 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81436:024661e7ca0b Date: 2015-12-23 11:50 +0100 http://bitbucket.org/pypy/pypy/changeset/024661e7ca0b/ Log:finished memcpy call, adding stack frame to the routine correctly diff --git

[pypy-commit] pypy memop-simplify3: zero array passes again, needed to pass both the start scale and the length scale to the backend,

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81451:d826b4e1e7da Date: 2015-12-28 12:58 +0100 http://bitbucket.org/pypy/pypy/changeset/d826b4e1e7da/ Log:zero array passes again, needed to pass both the start scale and the length scale to the

[pypy-commit] pypy memop-simplify3: merged default,

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81450:5988809aee50 Date: 2015-12-28 12:40 +0100 http://bitbucket.org/pypy/pypy/changeset/5988809aee50/ Log:merged default, continue to refactor zero_array to move the scaling to rewrite diff too long,

[pypy-commit] pypy memop-simplify3: removed _get_interiorfield_addr method and moved a stripped down version to the regalloc class

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81452:eb4a9cb58507 Date: 2015-12-28 13:11 +0100 http://bitbucket.org/pypy/pypy/changeset/eb4a9cb58507/ Log:removed _get_interiorfield_addr method and moved a stripped down version to the regalloc class

[pypy-commit] pypy s390x-backend: merged zero_array changes of memop-simplify3

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81457:992b689427ce Date: 2015-12-28 14:04 +0100 http://bitbucket.org/pypy/pypy/changeset/992b689427ce/ Log:merged zero_array changes of memop-simplify3 diff --git a/rpython/jit/backend/llsupport/rewrite.py

[pypy-commit] pypy s390x-backend: merged default

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81456:18c213bb83f6 Date: 2015-12-28 14:04 +0100 http://bitbucket.org/pypy/pypy/changeset/18c213bb83f6/ Log:merged default diff --git a/.gitignore b/.gitignore --- a/.gitignore +++ b/.gitignore @@ -29,4 +29,4 @@

[pypy-commit] pypy s390x-backend: copied stub for zero_array

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81455:5d9f0ada3241 Date: 2015-12-28 14:04 +0100 http://bitbucket.org/pypy/pypy/changeset/5d9f0ada3241/ Log:copied stub for zero_array diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy memop-simplify3: updated test_rewrite and added parameters through a helper function

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81453:710abc88181b Date: 2015-12-28 13:44 +0100 http://bitbucket.org/pypy/pypy/changeset/710abc88181b/ Log:updated test_rewrite and added parameters through a helper function diff --git

[pypy-commit] pypy memop-simplify3: reverted changes to malloc_nuresry_varsize, not sure how this solve this now, but I'll first implement zero_array in s390x

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify3 Changeset: r81454:52e124acc665 Date: 2015-12-28 14:03 +0100 http://bitbucket.org/pypy/pypy/changeset/52e124acc665/ Log:reverted changes to malloc_nuresry_varsize, not sure how this solve this now, but I'll first

[pypy-commit] pypy s390x-backend: first combinations of zero_array are now passing

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81458:763785c74cd6 Date: 2015-12-28 17:08 +0100 http://bitbucket.org/pypy/pypy/changeset/763785c74cd6/ Log:first combinations of zero_array are now passing diff --git a/rpython/jit/backend/test/runner_test.py

[pypy-commit] pypy s390x-backend: zero_array nearly passing, on some runs it still fails

2015-12-28 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81459:7ff79cde4286 Date: 2015-12-28 17:54 +0100 http://bitbucket.org/pypy/pypy/changeset/7ff79cde4286/ Log:zero_array nearly passing, on some runs it still fails diff --git

[pypy-commit] pypy s390x-backend: implemented release gil half way, lock release and reacquire solved (the former uses a serialization point to make the store visible to other cpus,

2015-12-21 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81410:4d4c6bd91480 Date: 2015-12-21 11:12 +0100 http://bitbucket.org/pypy/pypy/changeset/4d4c6bd91480/ Log:implemented release gil half way, lock release and reacquire solved (the former uses a

[pypy-commit] pypy s390x-backend: return types test for call release gil test passes, needed to save the floating point return value on the stack

2015-12-22 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81420:2a2bdeba9644 Date: 2015-12-22 14:19 +0100 http://bitbucket.org/pypy/pypy/changeset/2a2bdeba9644/ Log:return types test for call release gil test passes, needed to save the floating point return

[pypy-commit] pypy s390x-backend: first call to c (with release gil) passed, wrote 3 registers below the stack pointer. ppc has many registers, but zarch does not.

2015-12-21 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81411:fd4fa9b6a5d1 Date: 2015-12-21 12:56 +0100 http://bitbucket.org/pypy/pypy/changeset/fd4fa9b6a5d1/ Log:first call to c (with release gil) passed, wrote 3 registers below the stack pointer. ppc has

[pypy-commit] pypy s390x-backend: reverted changes to runner_test (for debug purpose), now the first errno test is fully passing

2015-12-22 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81422:5c47bf206610 Date: 2015-12-22 18:42 +0100 http://bitbucket.org/pypy/pypy/changeset/5c47bf206610/ Log:reverted changes to runner_test (for debug purpose), now the first errno test is fully passing

[pypy-commit] pypy s390x-backend: catchup with default changes

2015-12-22 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81423:b60fa730252e Date: 2015-12-22 18:45 +0100 http://bitbucket.org/pypy/pypy/changeset/b60fa730252e/ Log:catchup with default changes diff too long, truncating to 2000 out of 3312 lines diff --git

[pypy-commit] pypy s390x-backend: added code to save/restore/propagate exception information

2015-12-23 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81433:f8b22a235798 Date: 2015-12-23 10:22 +0100 http://bitbucket.org/pypy/pypy/changeset/f8b22a235798/ Log:added code to save/restore/propagate exception information diff --git

[pypy-commit] pypy s390x-backend: pushing constant base ptr of gc_store/load into literal pool

2015-12-23 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81434:24cc91a9576d Date: 2015-12-23 10:32 +0100 http://bitbucket.org/pypy/pypy/changeset/24cc91a9576d/ Log:pushing constant base ptr of gc_store/load into literal pool diff --git

[pypy-commit] pypy s390x-backend: wrong operation (SG instead of STG) lead to substraction instead of 64bit store, test_exception is now passing!

2015-12-30 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81501:79c8712b54e0 Date: 2015-12-30 16:31 +0100 http://bitbucket.org/pypy/pypy/changeset/79c8712b54e0/ Log:wrong operation (SG instead of STG) lead to substraction instead of 64bit store, test_exception

[pypy-commit] pypy s390x-backend: implementing card_masking_mask assembler in _write_barrier_fast_path

2015-12-17 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r81366:a74573715f49 Date: 2015-12-17 12:53 +0100 http://bitbucket.org/pypy/pypy/changeset/a74573715f49/ Log:implementing card_masking_mask assembler in _write_barrier_fast_path diff --git

[pypy-commit] pypy memop-simplify2: two more tests checking different supported cpu factors and the skipped int_mul/int_add and renamed index to indexed

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80944:4f4e031576c3 Date: 2015-11-25 16:19 +0100 http://bitbucket.org/pypy/pypy/changeset/4f4e031576c3/ Log:two more tests checking different supported cpu factors and the skipped int_mul/int_add and

[pypy-commit] pypy memop-simplify2: what if the descr is unsigned? added test cases to check the correct rewrite step

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80945:b702a96ea1be Date: 2015-11-25 16:25 +0100 http://bitbucket.org/pypy/pypy/changeset/b702a96ea1be/ Log:what if the descr is unsigned? added test cases to check the correct rewrite step diff --git

[pypy-commit] pypy memop-simplify2: added basic transformation tests that check getarrayitem_gc_irf -> gc_load_irf

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80943:ddb6d7bd0eca Date: 2015-11-25 16:00 +0100 http://bitbucket.org/pypy/pypy/changeset/ddb6d7bd0eca/ Log:added basic transformation tests that check getarrayitem_gc_irf -> gc_load_irf diff --git

[pypy-commit] pypy memop-simplify2: added tests for raw_load_i/f transformation to gc_load_i/f

2015-11-26 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80971:14b59b151355 Date: 2015-11-26 13:17 +0100 http://bitbucket.org/pypy/pypy/changeset/14b59b151355/ Log:added tests for raw_load_i/f transformation to gc_load_i/f diff --git

[pypy-commit] pypy memop-simplify2: raw_load_test passed with gc_load on x86

2015-11-26 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80972:629e7e112a13 Date: 2015-11-26 13:55 +0100 http://bitbucket.org/pypy/pypy/changeset/629e7e112a13/ Log:raw_load_test passed with gc_load on x86 diff --git a/rpython/jit/backend/x86/assembler.py

[pypy-commit] pypy memop-simplify2: added gc_load_indexed scaled to the assembler

2015-11-26 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80973:b3214e1778f7 Date: 2015-11-26 14:36 +0100 http://bitbucket.org/pypy/pypy/changeset/b3214e1778f7/ Log:added gc_load_indexed scaled to the assembler diff --git a/rpython/jit/backend/llsupport/rewrite.py

[pypy-commit] pypy memop-simplify2: added gc_store/gc_store_indexed as operation, started migration of setarrayitem in the backend to the new operations (also added the rewrite logic)

2015-11-26 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80974:2b979e24b5a8 Date: 2015-11-26 15:07 +0100 http://bitbucket.org/pypy/pypy/changeset/2b979e24b5a8/ Log:added gc_store/gc_store_indexed as operation, started migration of setarrayitem in the backend

[pypy-commit] pypy memop-simplify2: added a view more test cases for raw_store

2015-11-27 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80994:6c1e5acac108 Date: 2015-11-27 12:25 +0100 http://bitbucket.org/pypy/pypy/changeset/6c1e5acac108/ Log:added a view more test cases for raw_store diff --git

[pypy-commit] pypy memop-simplify2: raw_store got the wrong scaling factor passed in rewrite

2015-11-27 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80998:92f1f9606cd7 Date: 2015-11-27 13:28 +0100 http://bitbucket.org/pypy/pypy/changeset/92f1f9606cd7/ Log:raw_store got the wrong scaling factor passed in rewrite diff --git

[pypy-commit] pypy memop-simplify: partly renamed getarrayitem_gc to gc_load, reenabled other ops that will be removed (that was a too big "big bang" approach)

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify Changeset: r80939:80594aadbcd0 Date: 2015-11-25 13:46 +0100 http://bitbucket.org/pypy/pypy/changeset/80594aadbcd0/ Log:partly renamed getarrayitem_gc to gc_load, reenabled other ops that will be removed (that was a

[pypy-commit] pypy memop-simplify: close branch

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify Changeset: r80940:c081afd4ac18 Date: 2015-11-25 13:56 +0100 http://bitbucket.org/pypy/pypy/changeset/c081afd4ac18/ Log:close branch ___ pypy-commit mailing list

[pypy-commit] pypy memop-simplify2: successor of memop-simplify

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80941:cb29d1aae79a Date: 2015-11-25 13:57 +0100 http://bitbucket.org/pypy/pypy/changeset/cb29d1aae79a/ Log:successor of memop-simplify ___ pypy-commit mailing list

[pypy-commit] pypy memop-simplify2: added gc_load, gc_load_indexed as resop

2015-11-25 Thread plan_rich
Author: Richard Plangger Branch: memop-simplify2 Changeset: r80942:397e21b4ff04 Date: 2015-11-25 15:16 +0100 http://bitbucket.org/pypy/pypy/changeset/397e21b4ff04/ Log:added gc_load,gc_load_indexed as resop started the rewrite transformation and added dummies to

[pypy-commit] pypy s390x-backend: emit_finish now handles the case if a parameter is in the constant pool. it crashed before

2015-11-17 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r80739:4ccf3025389e Date: 2015-11-18 08:19 +0100 http://bitbucket.org/pypy/pypy/changeset/4ccf3025389e/ Log:emit_finish now handles the case if a parameter is in the constant pool. it crashed before diff

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