Re: [PULL for-7.2 0/5] hw/nvme fixes

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any user-visible changes. signature.asc Description: PGP signature

Re: [PATCH 0/3] python: testing fixes

On Fri, 2022-12-02 at 19:52 -0500, John Snow wrote: > A few tiny touchups needed for cutting edge 'flake8' tooling, a minor > type touchup in iotests, and extending the python tests to cover the > recently released Python 3.11. > > John Snow (3): >   Python: fix flake8 config >   iotests/check: Fi

Re: [PATCH 06/32] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models

On 4/12/22 20:05, Bernhard Beschow wrote: Suggested-by: Mark Cave-Ayland Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-10-shen...@gmail.com> --- hw/i386/pc_piix.c | 3 ++- hw/i386/pc_q35.c | 13 +++-- hw/isa/piix4.c| 2 +- hw/usb/hcd-uhci.c | 16 -

Re: [PATCH 04/32] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig

On 4/12/22 20:05, Bernhard Beschow wrote: Tracking dependencies via Kconfig seems much cleaner. Note that PIIX4 already depends on ACPI_PIIX4. Signed-off-by: Bernhard Beschow --- configs/devices/mips-softmmu/common.mak | 2 -- hw/mips/Kconfig | 1 + 2 files changed,

Re: [PULL for-7.2 0/5] hw/nvme fixes

On Sun, Dec 04, 2022 at 11:06:13AM -0500, Stefan Hajnoczi wrote: > On Thu, 1 Dec 2022 at 11:50, Klaus Jensen wrote: > > > > From: Klaus Jensen > > > > Hi, > > > > The following changes since commit c4ffd91aba1c3d878e99a3e7ba8aad4826728ece: > > > > Update VERSION for v7.2.0-rc3 (2022-11-29 18:15

Re: [PATCH 00/32] Consolidate PIIX south bridges

Sorry, the titles should have contained a "v3"... Am 4. Dezember 2022 19:05:21 UTC schrieb Bernhard Beschow : >This series consolidates the implementations of the PIIX3 and PIIX4 south > >bridges and is an extended version of [1]. The motivation is to share as much > >code as possible and to bring

[PATCH 22/32] hw/isa/piix4: Use Proxy PIC device

Aligns the code with PIIX3 such that PIIXState can be used in PIIX4, too. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-33-shen...@gmail.com> --- hw/isa/Kconfig | 2 +- hw/isa/piix4.c | 30 +++--- hw/mips/Kconfig | 1 + hw/mips/malta.c | 11 +++

[PATCH 08/32] hw/i386/pc: No need for rtc_state to be an out-parameter

Now that the RTC is created as part of the southbridges it doesn't need to be an out-parameter any longer. Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Message-Id: <20221022150508.26830-12-shen...@gmail.com> --- hw/i386/pc.c | 12 ++-- hw/i386/pc_piix.c| 2 +-

[PATCH 26/32] hw/isa/piix3: Merge hw/isa/piix4.c

Now that the PIIX3 and PIIX4 device models are sufficiently consolidated, their implementations can be merged into one file for further consolidation. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-37-shen...@gmail.com> --- MAINTAINERS| 6 +- hw/i386/Kconfig

[PATCH 06/32] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models

Suggested-by: Mark Cave-Ayland Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-10-shen...@gmail.com> --- hw/i386/pc_piix.c | 3 ++- hw/i386/pc_q35.c | 13 +++-- hw/isa/piix4.c| 2 +- hw/usb/hcd-uhci.c | 16 hw/usb/hcd-uhci.h | 4 5 files ch

[PATCH 05/32] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge

The next patches will need to take advantage of it. Signed-off-by: Bernhard Beschow Reviewed-by: Peter Maydell Message-Id: <20221022150508.26830-3-shen...@gmail.com> --- hw/i386/pc_piix.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c

[PATCH 19/32] hw/isa/piix3: Rename typedef PIIX3State to PIIXState

This commit marks the finalization of the PIIX3 preparations to be merged with PIIX4. In particular, PIIXState is prepared to be reused in piix4.c. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-25-shen...@gmail.com> --- hw/isa/piix3.c

[PATCH 14/32] hw/isa/piix3: Wire up ACPI interrupt internally

Now that PIIX3 has the PIC integrated, the ACPI controller can be wired up internally. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-18-shen...@gmail.com> --- hw/i386/pc_piix.c | 1 - hw/isa/piix3.c| 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i

[PATCH 18/32] hw/isa/piix3: Prefix pci_slot_get_pirq() with "piix3_"

The additional prefix aligns the function name with both other piix3-internal functions as well as QEMU conventions. Furthermore, it will help to distinguish the function from its PIIX4 counterpart once merged. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <2022

[PATCH 00/32] Consolidate PIIX south bridges

This series consolidates the implementations of the PIIX3 and PIIX4 south bridges and is an extended version of [1]. The motivation is to share as much code as possible and to bring both device models to feature parity such that perhaps PIIX4 can become a drop-in-replacement for PIIX3 in the pc mac

[PATCH 29/32] hw/isa/piix: Rename functions to be shared for interrupt triggering

PIIX4 will get the same optimizations which are already implemented for PIIX3. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-40-shen...@gmail.com> --- hw/isa/piix.c | 56 +-- 1 file changed, 28 insertions(+), 28 deletions(-) di

[PATCH 13/32] hw/isa/piix3: Create IDE controller in host device

Now that PIIX3 contains the new isa-pic, it is possible to instantiate PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its interrupts to the ISA bus in its realize method which requires the interrupt controller to provide fully populated qemu_irqs. This is the case for isa-pic even though th

[PATCH 03/32] hw/isa/piix4: Correct IRQRC[A:D] reset values

From: Philippe Mathieu-Daudé IRQRC[A:D] registers reset value is 0x80. We were forcing the MIPS Malta machine routing to be able to boot a Linux kernel without any bootloader. We now have these registers initialized in the Malta machine write_bootloader(), so we can use the correct reset values.

[PATCH 27/32] hw/isa/piix: Harmonize names of reset control memory regions

There is no need for having different names here. Having the same name further allows code to be shared between PIIX3 and PIIX4. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-38-shen...@gmail.com> --- hw/isa/piix.c | 4 ++-- 1 file changed

[PATCH 11/32] hw/core: Introduce proxy-pic

Having a proxy PIC allows for ISA PICs to be created and wired up in southbridges. This is especially useful for PIIX3 for two reasons: First, the southbridge doesn't need to care about the virtualization technology used (KVM, TCG, Xen) due to in-IRQs (where devices get attached) and out-IRQs (whic

[PATCH 32/32] hw/isa/piix: Drop the "3" from the PIIX base class

Now that the base class is used for both PIIX3 and PIIX4, the "3" became misleading. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-43-shen...@gmail.com> --- hw/isa/piix.c | 8 include/hw/southbridge/piix.h | 6 ++ 2 files changed, 6 insertions(+),

[PATCH 30/32] hw/isa/piix: Consolidate IRQ triggering

Speeds up PIIX4 which resolves an old TODO. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-41-shen...@gmail.com> --- hw/isa/piix.c | 26 +++--- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 3d1659e5fd..d0

[PATCH 24/32] hw/isa/piix4: Rename reset control operations to match PIIX3

Both implementations are the same and will be shared upon merging. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-35-shen...@gmail.com> --- hw/isa/piix4.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/i

[PATCH 20/32] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional

This aligns PIIX4 with PIIX3. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-30-shen...@gmail.com> --- hw/isa/piix4.c | 44 hw/mips/malta.c | 6 -- 2 files changed, 36 insertions(+), 14 deletions(-) diff --git a/hw/isa/piix4.

[PATCH 21/32] hw/isa/piix4: Remove unused code

The Malta board, which is the only user of PIIX4, doesn't connect to the exported interrupt lines. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-32-shen...@gmail.com> --- hw/isa/piix4.c | 8 1 file changed, 8 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c

[PATCH 10/32] hw/isa/piix3: Create power management controller in host device

The power management controller is an integral part of PIIX3 (function 3). So create it as part of the south bridge. Note that the ACPI function is optional in QEMU. This is why it gets object_initialize_child()'ed in realize rather than in instance_init. Signed-off-by: Bernhard Beschow Message-

[PATCH 23/32] hw/isa/piix4: Reuse struct PIIXState from PIIX3

Now that PIIX4 also uses the "proxy-pic", both implementations can share the same struct. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-34-shen...@gmail.com> --- hw/isa/piix4.c | 51 +++--- 1 file changed, 15 insertions(+), 36 delet

[PATCH 31/32] hw/isa/piix: Share PIIX3 base class with PIIX4

Having a common base class allows for substituting PIIX3 with PIIX4 and vice versa. Moreover, it makes PIIX4 implement the acpi-dev-aml-interface. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-42-shen...@gmail.com> --- hw/isa/piix.c | 53 +++---

[PATCH 25/32] hw/isa/piix4: Prefix pci_slot_get_pirq() with "piix4_"

Prefixing with "piix4_" makes the method distinguishable from its PIIX3 counterpart upon merging and also complies more with QEMU conventions. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-36-shen...@gmail.com> --- hw/isa/piix4.c | 5 +++-- 1 file changed, 3 insertions(+), 2

[PATCH 07/32] hw/i386/pc: Create RTC controllers in south bridges

Just like in the real hardware (and in PIIX4), create the RTC controllers in the south bridges. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-11-shen...@gmail.com> --- hw/i386/pc.c | 12 +++- hw/i386/pc_piix.c | 8 hw/i386/pc_q35

[PATCH 09/32] hw/isa/piix3: Create USB controller in host device

The USB controller is an integral part of PIIX3 (function 2). So create it as part of the south bridge. Note that the USB function is optional in QEMU. This is why it gets object_initialize_child()'ed in realize rather than in instance_init. Signed-off-by: Bernhard Beschow Message-Id: <202210221

[PATCH 28/32] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4

Resolves duplicate code. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-39-shen...@gmail.com> --- hw/isa/piix.c | 65 +++ 1 file changed, 9 insertions(+), 56 deletions(-) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 035f64b9

[PATCH 16/32] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4

Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-22-shen...@gmail.com> --- hw/isa/piix3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 7ee706243a..a811a9bdab 100644 --- a/hw/isa/

[PATCH 12/32] hw/isa/piix3: Create Proxy PIC in host device

Use the newly introduced TYPE_PROXY_PIC which allows for wiring up devices in the southbridge where the virtualization technology used (KVM, TCG, Xen) is not yet known. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-16-shen...@gmail.com> --- hw/i386/Kconfig | 1

[PATCH 02/32] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader

From: Philippe Mathieu-Daudé Linux kernel expects the northbridge & southbridge chipsets configured by the BIOS firmware. We emulate that by writing a tiny bootloader code in write_bootloader(). Upon introduction in commit 5c2b87e34d ("PIIX4 support"), the PIIX4 configuration space included valu

[PATCH 17/32] hw/isa/piix3: Rename piix3_reset() for sharing with PIIX4

Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-23-shen...@gmail.com> --- hw/isa/piix3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index a811a9bdab..e99622699a 100644 --- a/hw/isa/

[PATCH 15/32] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS

PIIX_NUM_PIC_IRQS is assumed to be the same as ISA_NUM_IRQS, otherwise inconsistencies can occur. Signed-off-by: Bernhard Beschow Message-Id: <20221022150508.26830-21-shen...@gmail.com> --- hw/isa/piix3.c| 8 include/hw/southbridge/piix.h | 5 ++--- 2 files changed, 6 in

[PATCH 04/32] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig

Tracking dependencies via Kconfig seems much cleaner. Note that PIIX4 already depends on ACPI_PIIX4. Signed-off-by: Bernhard Beschow --- configs/devices/mips-softmmu/common.mak | 2 -- hw/mips/Kconfig | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/c

[PATCH 01/32] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition

From: Philippe Mathieu-Daudé The PIIX4 PCI-ISA bridge function is always located at 10:0. Since we want to re-use its address, add the PIIX4_PCI_DEVFN definition. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20221027204720.33611-2-phi...@linaro.org> --- hw/mips/malta.c | 4 +++- 1 file c

Re: [PULL for-7.2 0/5] hw/nvme fixes

On Thu, 1 Dec 2022 at 11:50, Klaus Jensen wrote: > > From: Klaus Jensen > > Hi, > > The following changes since commit c4ffd91aba1c3d878e99a3e7ba8aad4826728ece: > > Update VERSION for v7.2.0-rc3 (2022-11-29 18:15:26 -0500) > > are available in the Git repository at: > > git://git.infradead.or