On 05/01/2023 14:32, Bernhard Beschow wrote:
This even spares some casts in hot code paths along the way.
Signed-off-by: Bernhard Beschow
---
Note: The next patch will introduce a class "isa-pic", which is
shall not be confused with the isa_pic singleton.
---
include/hw/intc/i8259.h | 6 ++
On 05/01/2023 14:32, Bernhard Beschow wrote:
Having an i8259 proxy allows for ISA PICs to be created and wired up in
southbridges. This is especially interesting for PIIX3 for two reasons:
First, the southbridge doesn't need to care about the virtualization
technology used (KVM, TCG, Xen) due to
On 05/01/2023 14:32, Bernhard Beschow wrote:
The Malta board, which is the only user of PIIX4, doesn't connect to the
exported interrupt lines. PIIX3 doesn't expose such intterupt lines
typo here: s/intterupt/interrupt/
either, so remove them for PIIX4 for simplicity and consistency.
Signed
On 05/01/2023 14:32, Bernhard Beschow wrote:
Now that PIIX4 also uses the "proxy-pic", both implementations
Should "proxy-pic" be replaced with "isa-pic" (or even TYPE_ISA_PIC) here?
can share the same struct.
Signed-off-by: Bernhard Beschow
Reviewed-by: Michael S. Tsirkin
Message-Id: <20
On 05/01/2023 14:31, Bernhard Beschow wrote:
This series consolidates the implementations of the PIIX3 and PIIX4 south
bridges and is an extended version of [1]. The motivation is to share as much
code as possible and to bring both device models to feature parity such that
perhaps PIIX4 can beco
On Thu, Jan 5, 2023 at 6:43 AM Philippe Mathieu-Daudé wrote:
>
> pflash_cfi01_register() hides an implicit sysbus mapping of
> MMIO region #0. This is not practical in a heterogeneous world
> where multiple cores use different address spaces. In order to
> remove to remove pflash_cfi01_register()
