On 3/24/21 11:54 AM, Philippe Mathieu-Daudé wrote:
The 2 cascaded 8259 PIC are managed by the PCI function #0
(ISA bridge). Expose the 16 IRQs on this function, so other
functions from the same chipset can access them.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/vt82c686.c | 13
The 2 cascaded 8259 PIC are managed by the PCI function #0
(ISA bridge). Expose the 16 IRQs on this function, so other
functions from the same chipset can access them.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/vt82c686.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)