[PATCH v2 01/16] nvme: fix pci doorbell size calculation

2020-04-15 Thread Klaus Jensen
From: Klaus Jensen The size of the BAR is 0x1000 (main registers) + 8 bytes for each queue. Currently, the size of the BAR is calculated like so: n->reg_size = pow2ceil(0x1004 + 2 * (n->num_queues + 1) * 4); Since the 'num_queues' parameter already accounts for the admin queue, this should

Re: [PATCH v2 01/16] nvme: fix pci doorbell size calculation

2020-04-15 Thread Philippe Mathieu-Daudé
On 4/15/20 3:01 PM, Klaus Jensen wrote: From: Klaus Jensen The size of the BAR is 0x1000 (main registers) + 8 bytes for each queue. Currently, the size of the BAR is calculated like so: n->reg_size = pow2ceil(0x1004 + 2 * (n->num_queues + 1) * 4); Since the 'num_queues' parameter already

Re: [PATCH v2 01/16] nvme: fix pci doorbell size calculation

2020-04-21 Thread Maxim Levitsky
On Wed, 2020-04-15 at 15:13 +0200, Philippe Mathieu-Daudé wrote: > On 4/15/20 3:01 PM, Klaus Jensen wrote: > > From: Klaus Jensen > > > > The size of the BAR is 0x1000 (main registers) + 8 bytes for each > > queue. Currently, the size of the BAR is calculated like so: > > > > n->reg_size =