Re: [PATCH v3 3/3] hw/block/m25p80: Fix Numonyx fast read dummy cycle count

2020-11-11 Thread Francisco Iglesias
Hi Joe, On Thu, Nov 05, 2020 at 05:32:58PM -0800, Joe Komlodi wrote: > Numonyx chips determine the number of cycles to wait based on bits 7:4 > in the volatile configuration register. > > However, if these bits are 0x0 or 0xF, the number of dummy cycles to wait is > 10 on a QIOR or QIOR4 command,

[PATCH v3 3/3] hw/block/m25p80: Fix Numonyx fast read dummy cycle count

2020-11-05 Thread Joe Komlodi
Numonyx chips determine the number of cycles to wait based on bits 7:4 in the volatile configuration register. However, if these bits are 0x0 or 0xF, the number of dummy cycles to wait is 10 on a QIOR or QIOR4 command, or 8 on any other currently supported fast read command. [1] [1] https://www.m