qemu-de...@nongnu.org
> Cc: Francisco Eduardo Iglesias ; kw...@redhat.com;
> alist...@alistair23.me; qemu-block@nongnu.org; mre...@redhat.com
> Subject: Re: [PATCH v2 1/1] hw/block/m25p80: Fix Numonyx fast read dummy
> cycle count
>
> Hi Joe,
>
> On 10/28/20 12:43 AM, Joe K
.me; qemu-block@nongnu.org; mre...@redhat.com
Subject: Re: [PATCH v2 1/1] hw/block/m25p80: Fix Numonyx fast read dummy cycle
count
Hi Joe,
On 10/28/20 12:43 AM, Joe Komlodi wrote:
> Numonyx chips determine the number of cycles to wait based on bits 7:4
> in the volatile configuration re
Hi Joe,
On 10/28/20 12:43 AM, Joe Komlodi wrote:
> Numonyx chips determine the number of cycles to wait based on bits 7:4 in the
> volatile configuration register.
>
> However, if these bits are 0x0 or 0xF, the number of dummy cycles to wait is
> 10 on a QIOR or QIOR4 command, or 8 on any other
