On Tuesday, 4 July 2006 4:06 PM, John R. Hogerhuis wrote:
>On Mon, 2006-07-03 at 03:03 -0400, Armistead, Jason wrote:
>> Hi
>>
>> With SIMH, the VAX / PDP / nostalgic mini/mainframe emulator
>> (http://simh.trailing-edge.com/) the console port on the emulated system
is
>> directed to a TCP/IP por
On Mon, 2006-07-03 at 03:03 -0400, Armistead, Jason wrote:
> Hi
>
> With SIMH, the VAX / PDP / nostalgic mini/mainframe emulator
> (http://simh.trailing-edge.com/) the console port on the emulated system is
> directed to a TCP/IP port, so that you can simply Telnet into it. Once the
> connection
Hi All,
I was trying to setup a IPv6 network using multiple
instances of qemu guests but was getting various errors
The IPv4 network was working fine.
(ping works but not ping6 ).
Is IPv6 network possible using qemu vlan ??
Thanks
Niraj
___
Q
Mark's notes on the qcow format got me to thinking how useful it would
be to be able to store other information in the qcow image itself. For
instance you could store the configuration for the virtual machine in
the image which could be extracted and then start the virtual machine.
So... I'm prop
lo list. I've made an attempt to add support for devices with
multiple configurations (and interfaces), but do not own a device to
test it on. If someone with such a device could test this it would be
very helpful. The patch is against CVS - the other limitations still
hold true such as no de
; http://www.gnome.org/~markmc/qcow-image-format.html
> > >
> > > Perhaps worth including in QEMU itself?
> > >
> > > Cheers,
> > > Mark.
> > >
> > >
> > >
> > > __
Stefan Weil wrote:
> Hi all,
>
> just for information about current projects for QEMU MIPS:
>
> my machine is AR7 which includes a MIPS 4KEc core.
> This core supports the MIPS32R2 architecture and has no FPU.
>
> As far as I know the MIPS architecture, most CPU features
> can be read from well
Hi all,
just for information about current projects for QEMU MIPS:
my machine is AR7 which includes a MIPS 4KEc core.
This core supports the MIPS32R2 architecture and has no FPU.
As far as I know the MIPS architecture, most CPU features
can be read from well defined bits and bytes in the CP0 re
Dirk Behme wrote:
> Thiemo Seufer wrote:
> >Dirk Behme wrote:
> >>- As I understand it, MIPS III is an extension of MIPS II,
> >>MIPS IV is an extension of MIPS III etc. Therefore I used
> >>definitions for ISAx which include the smaller ones as well.
> >
> >Unfortunately it is not that simple. We
Requiring that ops don't use a stack frame doesn't seem like a realistic
constraint.
It can be done, see my latest patch. Of course there's no point doing it if
there is no real need.
> The remaining target specific problem with PPC FPU ops could be solved
by
> changing PPC to soft float. W
Dirk Behme wrote:
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
...
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function converting a CPU "str
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
...
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function converting a CPU "string id" into an id +
Thiemo Seufer wrote:
Dirk Behme wrote:
- As I understand it, MIPS III is an extension of MIPS II,
MIPS IV is an extension of MIPS III etc. Therefore I used
definitions for ISAx which include the smaller ones as well.
Unfortunately it is not that simple. We have the upward-compatible ISAs:
Mm
On Saturday 01 July 2006 22:41, Fabrice Bellard wrote:
> Modified files:
> hw : rtl8139.c
>
> Log message:
> disable unimplemented C+ mode (aka windows xp 64 fix)
I'm not sure I believe this. C+ mode works fine in linux, and on a simple TCP
throughput test was ~20% faster
> I got the i386-user to build by moving the troublesome SSE ops to helper
> (only for Sparc32/64, no effect at least to x86 host). The emulator crashes
> when executing the first TB, code generation and register use could be
> suspected. The patch makes ops_sse.h more confusing to read. Any commen
OK then, a question for Fabrice: how long till we see QEMU 0.8.2 released ?
The current 0.8.1 version has been around for 2 months now and there are
many new and exciting changes that have been added by the hard-working
contributors to this list.
Regards
Jason Armistead
-Original Message---
This was recently added to cvs. The next release of QEMU will have it,
until then you would need to build it from cvs.
-serial telnet::,server
Cheers,
Jason.
> -Original Message-
> From:
> [EMAIL PROTECTED]
> [mailto:[EMAIL PROTECTED]
> rg] On Behalf Of Armistead, Jason
> Sent: M
Host OS:win98se Guest Os:Dos 7.1qemu command:
Change fda D:\QEMU\test.img ;Load virtual floppy driver
qemu command:
info Block ;virtual floppy driver had installed After press ctrl+alt+1 key ,at Guest OS C:>A: Enter key, Guest OS still show the message: "No
Fabrice Bellard wrote:
[snip]
> >>>There is no good reason to make
> >>>the selection at compile time because the translator can efficiently
> >>>handle any CPU differences at runtime.
> >
> >
> >I'm a bit dubious about this argument, each instruction needs to be
> >checked agains a tuple of valu
Hi all,Is it possible to reserve memory addresses in i386 qemu emulation for recognize them as device registers?ThanksAlessandro
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Hi Fabrice,
If you think it's useful to have it in the sources, please do go ahead
and commit it. That way others can keep it up to date, at least.
Cheers,
Mark.
On Mon, 2006-07-03 at 10:42 +0200, Fabrice Bellard wrote:
> Hi,
>
> I added a link from the qemu technical documentation html
Hi,
I added a link from the qemu technical documentation html page. I can
also commit it in the QEMU sources if you want.
Regards,
Fabrice.
Mark McLoughlin wrote:
Hi,
I wrote up some notes on the QCOW format:
http://www.gnome.org/~markmc/qcow-image-format.html
Perhaps wo
Thiemo Seufer wrote:
Dirk Behme wrote:
Fabrice Bellard wrote:
You should add a runtime selection system : see the ARM and PowerPC
targets (I would prefer a parameter to cpu_init(). It was not done that
way on PowerPC for legacy reasons). Each machine should be able to
select the processor i
Hi
With SIMH, the VAX / PDP / nostalgic mini/mainframe emulator
(http://simh.trailing-edge.com/) the console port on the emulated system is
directed to a TCP/IP port, so that you can simply Telnet into it. Once the
connection is established, then the SIMH emulator starts working. This
suits SIMH
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