Paul Brook wrote:
On Thursday 01 March 2007 17:26, Laurent Vivier wrote:
Hi,
As I'm a newcomer, I don't know the story about qemu/pc and scsi disks, but
I propose a little patch to make SCSI disks visible.
See previous discussion about how the disk options need to be fixed properly.
Laurent Vivier wrote:
Paul Brook wrote:
On Thursday 01 March 2007 17:26, Laurent Vivier wrote:
Hi,
As I'm a newcomer, I don't know the story about qemu/pc and scsi disks, but
I propose a little patch to make SCSI disks visible.
See previous discussion about how the disk options
Was doing some testing on a sparc host, and found an interesting situation.
Code is 0.9.0-CVS, and I start qemu on my Ultra 60 (guest is windows 98se).
When I hit ctrl-alt-2, I don't get the monitor. I've added some debugging to
sdl.c, to try and figure out what is going on.
Hitting
stracing qemu showed, that the corresponding device file in /proc could not be
opened. A pcscd already grepped it. After stopping pcscd the smartcard was
available to the client.
Norbert Wegener
my host operating system is ubuntu. I have an usb smartcard reader attached.
qemu version is 0.9.0.
There's also no reason to limit to 7 disks, and we should support scsi
cdroms.
The reason for 7 is the number of available id on the scsi bus.
For wide scsi it is 15.
I wouldn't bet on wide scsi working.
For PCI based systems you can add more host adapters to get more devices. I
On Wednesday 21 Feb 2007, Ben Taylor wrote:
Robin Atwood [EMAIL PROTECTED] wrote:
This has been driving me mad! I have just installed Solaris 10 under Qemu
and specified the Xorg server to be used. I created xorg.conf with
xorgconfig and X started fine at 1024x768 using the Cirrus
Hey guys thanks for a great product. I don't know if its been documented
already but I was able to install windows xp on qemu with a HP Laptop Restore
disk.
I did need my key from the bottom. I hope this meets the EULA . My laptop did
die last year and I have been wondering what I could do
Paul Brook wrote:
There's also no reason to limit to 7 disks, and we should support scsi
cdroms.
The reason for 7 is the number of available id on the scsi bus.
For wide scsi it is 15.
I wouldn't bet on wide scsi working.
For PCI based systems you can add more host
Hello All,
I changed the pcnet32 driver to get rid of bitfields in its
implementation, now it works also on big endian host systems.
I tested only the 32 bit mode which is used by MIPS/Malta, and
I'm not sure if it still works in Lance mode (as e.g. used on SPARC).
So please test if it still
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/03/02 20:36:23
Modified files:
hw : mips_malta.c
Log message:
Fix wrong interrupt number for the second serial interface.
CVSWeb URLs:
Thiemo Seufer wrote:
Hello All,
I changed the pcnet32 driver to get rid of bitfields in its
implementation, now it works also on big endian host systems.
I tested only the 32 bit mode which is used by MIPS/Malta, and
I'm not sure if it still works in Lance mode (as e.g. used on SPARC).
Handling extra signals in syscall.c/syscalls.h. Patch
is attached.
Thanks,
Ilya
Don't get soaked. Take a quick peak at the forecast
with the Yahoo! Search weather shortcut.
On Fri, Mar 02, 2007 at 08:09:49PM +, Thiemo Seufer wrote:
Hello All,
I changed the pcnet32 driver to get rid of bitfields in its
implementation, now it works also on big endian host systems.
I find this curious... C99 (6.7.2.1) says the allocation order of
bit-fields within a unit
Thiemo Seufer wrote:
Thiemo Seufer wrote:
Hello All,
I changed the pcnet32 driver to get rid of bitfields in its
implementation, now it works also on big endian host systems.
I tested only the 32 bit mode which is used by MIPS/Malta, and
I'm not sure if it still works in Lance mode (as e.g.
In message: [EMAIL PROTECTED]
Stuart Brady [EMAIL PROTECTED] writes:
: On Fri, Mar 02, 2007 at 08:09:49PM +, Thiemo Seufer wrote:
: Hello All,
:
: I changed the pcnet32 driver to get rid of bitfields in its
: implementation, now it works also on big endian host systems.
:
: I
: I find this curious... C99 (6.7.2.1) says the allocation order of
: bit-fields within a unit (high-order to low-order or low-order to
: high-order) is implementation defined. I can't see any requirement
: for this, so is it just convention that bitfields on big endian systems
: start from
In message: [EMAIL PROTECTED]
Paul Brook [EMAIL PROTECTED] writes:
: : I find this curious... C99 (6.7.2.1) says the allocation order of
: : bit-fields within a unit (high-order to low-order or low-order to
: : high-order) is implementation defined. I can't see any requirement
:
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