On 11/4/07, J. Mayer <[EMAIL PROTECTED]> wrote:
>
> On Sun, 2007-11-04 at 09:12 +0200, Blue Swirl wrote:
> > On 11/4/07, Fabrice Bellard <[EMAIL PROTECTED]> wrote:
> > > Blue Swirl wrote:
> > > > Hi,
> > > >
> > > > RISC CPUs don't support self-modifying code unless the affected area
> > > > is flu
On 11/1/07, Fabrice Bellard <[EMAIL PROTECTED]> wrote:
> Blue Swirl wrote:
> > Hi,
> >
> > With the automatic dependency rule installed, modifying vl.h causes
> > all files to be recompiled. This is of course the correct action, but
> > it's a major slowdown for development too.
>
> There must be a
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/04 08:49:01
Modified files:
hw : grackle_pci.c
Log message:
Fix grackle (in fact MPC106) PCI host bridge header
to avoid confusing firmwares and OSes.
CVSWeb URLs:
http:/
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Andrzej Zaborowski 07/11/04 11:42:11
Modified files:
hw : omap.c omap.h omap1_clk.c
Log message:
Make accesses with wrong width also work as apparently real hardware
allows them when the fault is
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/11/04 11:59:15
Modified files:
. : vl.h
hw : fdc.c sun4m.c
Log message:
Remove target dependent code
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/vl.h?c
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/11/04 12:00:18
Modified files:
hw : fdc.c
Log message:
Constification
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/hw/fdc.c?cvsroot=qemu&r1=1.28&r2=1.29
> I have another solution: include all architecture specific files from
> the main file.
I'd really rather not do this. I doubt it's going to be a win, as now you have
to recompile the whole thing every time you change the implementation. At
least with vl.h you only have to recompile when you ch
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Andrzej Zaborowski 07/11/04 12:19:22
Modified files:
hw : omap.c omap.h omap_i2c.c omap_mmc.c
Log message:
Add register mappings in DSP space (must be accessible for MPU too).
Don't set mi
The sysctrl register is actually 32 bits. Add code to access it as 32 bits.
Index: hw/slavio_misc.c
===
RCS file: /sources/qemu/qemu/hw/slavio_misc.c,v
retrieving revision 1.10
diff -p -u -r1.10 slavio_misc.c
--- hw/slavio_misc.c
Please use this version. The previous version didn't mask off the top
address bit.
The sysctrl register is actually 32 bits. Add code to access it as 32
bits.
Index: hw/slavio_misc.c
===
RCS file: /sources/qemu/qemu/hw/slavio_
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/11/04 16:58:08
Modified files:
hw : fdc.c
Log message:
Fix Solaris breakage
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/hw/fdc.c?cvsroot=qemu&r1=1.29&r2=1.30
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/04 17:17:09
Modified files:
hw : fdc.c
Log message:
Fix memory corruption: bdrv_read/write API has been changed to take
nb_sectors instead of len in bytes but the fdc dri
On Sun, 2007-11-04 at 12:17 +, Paul Brook wrote:
> > I have another solution: include all architecture specific files from
> > the main file.
>
> I'd really rather not do this. I doubt it's going to be a win, as now you
> have
> to recompile the whole thing every time you change the implemen
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/11/04 17:27:07
Modified files:
hw : slavio_misc.c
Log message:
Change sysctrl register to 32 bits (original patch by Robert Reif)
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu
On 11/4/07, Robert Reif <[EMAIL PROTECTED]> wrote:
> Please use this version. The previous version didn't mask off the top
> address bit.
>
> > The sysctrl register is actually 32 bits. Add code to access it as 32
> > bits.
Thanks. I made some changes to avoid updating the savevm format version.
On Sunday 04 November 2007, J. Mayer wrote:
> On Sun, 2007-11-04 at 12:17 +, Paul Brook wrote:
> > > I have another solution: include all architecture specific files from
> > > the main file.
> >
> > I'd really rather not do this. I doubt it's going to be a win, as now you
> > have to recompile
Blue Swirl wrote:
> On 11/1/07, Fabrice Bellard <[EMAIL PROTECTED]> wrote:
> > Blue Swirl wrote:
> > > Hi,
> > >
> > > With the automatic dependency rule installed, modifying vl.h causes
> > > all files to be recompiled. This is of course the correct action, but
> > > it's a major slowdown for deve
Hello
I'm trying to connect gdb to qemu and it seems not to
work correctly.
I mean it does not wait for gdb to connect.
I perform the following command to do that:
qemu -s -kernel arch/i386/boot/bzImage -hda
root-2.4.20.img -append "root=/dev/hda"
It just runs like this option hasn't been specif
Pawel K wrote:
> Hello
>
> I'm trying to connect gdb to qemu and it seems not to
> work correctly.
> I mean it does not wait for gdb to connect.
> I perform the following command to do that:
>
> qemu -s -kernel arch/i386/boot/bzImage -hda
> root-2.4.20.img -append "root=/dev/hda"
>
> It just run
On Sun, 2007-11-04 at 17:54 +, Paul Brook wrote:
> On Sunday 04 November 2007, J. Mayer wrote:
> > On Sun, 2007-11-04 at 12:17 +, Paul Brook wrote:
> > > > I have another solution: include all architecture specific files from
> > > > the main file.
> > >
> > > I'd really rather not do this
> > I not sure a single hw/hw.h file will give any benefit because there's a
> > fair amount of interfacing between the target devices emulation and the
> > host side interaction code. i.e. there's not much that's only used inside
> > hw/. hw/ is about as big as most of the rest of qemu put togethe
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Andrzej Zaborowski 07/11/04 22:53:50
Modified files:
. : vl.h
hw : omap.c omap.h omap1_clk.c palm.c tsc210x.c
Log message:
Zeroing ITR shouldn't ack irq zero.
Fix P
Paul Brook wrote:
> > > I not sure a single hw/hw.h file will give any benefit because there's a
> > > fair amount of interfacing between the target devices emulation and the
> > > host side interaction code. i.e. there's not much that's only used inside
> > > hw/. hw/ is about as big as most of th
I'm looking at adding more complete support for different sparc32
CPUs, MMUs, cache controllers and systems.
Each CPU/MMU/cache controller combination is slightly different and
requires its own unique state. For example the two CPUs currently
supported save the boot mode in different bits in th
On Sunday 04 November 2007, Robert Reif wrote:
> I'm looking at adding more complete support for different sparc32
> CPUs, MMUs, cache controllers and systems.
>
> Each CPU/MMU/cache controller combination is slightly different and
> requires its own unique state. For example the two CPUs current
Its known bug of gcc4. you should compile on gcc 3.
Please check the following qemu FAQ.
http://calamari.reverse-dns.net:980/cgi-bin/moin.cgi/FrequentlyAskedQuestions#head-1dd86241b11d36963df140c9f6ab46ef402d4244
Thanks
Atsushi SAKAI
Alexander <[EMAIL PROTECTED]> wrote:
> Hello.
> I have (GCC
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/05 03:11:37
Modified files:
hw : fdc.c
Log message:
No functional changes: remove dead code and fix indentation & wrapping
lines.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs
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