Stefan Weil wrote:
Here is a patch using WIN32_LEAN_AND_MEAN which tries not to break
dsound (and vl.c). I could only test it using cross compilation from Linux,
so please send comments.
Patch description:
* add WIN32_LEAN_AND_MEAN to all inclusions of windows.h
* remove windows.h from vl.c (it
The VGA refresh (a 33 Hz timer) is running even with -nographics,
apparently doing nothing. The vga_hw_update() call ends up just
returning, because the display depth is zero.
This patch removes the dummy refresh handler, and thus the GUI refresh
timer.
With an idle dyntick Linux guest in q
(resending with the subscribed sender address)
> % time seconds usecs/call callserrors syscall
> -- --- --- - -
> 99.740.012590 1 22766 2706 ioctl
>0.260.33 0 27044 clock
Am 12.12.2007 um 13:08 schrieb Alexander Graf:
Does it work if you specify "-framework CoreFoundation -framework
IOKit" in your LDFLAGS? That's what was needed on my Leopard x86_64
build.
If I configure with LDFLAGS:
LDFLAGS="-framework CoreFoundation -framework IOKit" ./configure --
pref
The dynticks code in qemu sets and gets timers very often. These
are the system calls (strace -c) of qemu/kvm running an idle Linux
kernel at 250Hz for 10 seconds:
% time seconds usecs/call callserrors syscall
-- --- --- - -
99.
Hello all.
Is it possible run several VM connected with one tap device?
I tried to run two VM with allready exist tap0 but when I started second
I've got message: "warning: could not configure /dev/net/tun: no virtual
network emulation Could not initialize device 'tap' ".
I did following under ro
Here is a patch using WIN32_LEAN_AND_MEAN which tries not to break
dsound (and vl.c). I could only test it using cross compilation from Linux,
so please send comments.
Patch description:
* add WIN32_LEAN_AND_MEAN to all inclusions of windows.h
* remove windows.h from vl.c (it is already included o
On Thu, Dec 13, 2007 at 01:21:03AM +, Paul Brook wrote:
> I disagree. The TLS register is part of the CPU state. On many machines
> (including ARMv6 CPUs) it's an actual CPU register. I'm fairly sure the same
> is true for recent MIPS revisions.
That's correct, though I don't know if there i
I just want to confirm that the fix works also for MinGW. At first I dind't
like the word "type" and would have preferred something like "if_type", but I
realized that drives[i].type is just as readable as drives[i].if_type.
- Original Message
From: Hervé Poussineau <[EMAIL PROTECTED]>
Hi everybody,
I get a segfault with qemu-ppc-softmmu, Source downloaded yesterday, 12/12/O7.
After dump my program, I see this instruction fails at nip
4d d6 d1 c2 crnand 4*cr3+eq,4*cr5+eq,4*cr6+eq
in function
translate.c: static inline int gen_intermediate_code_internal
l 6218
/*
Paul Brook wrote:
- It would be good to limit the changes in the CPU emulation code to
handle the TLS. For example, on MIPS, the TLS register must not be
stored in the CPU state. Same for ARM.
I disagree. The TLS register is part of the CPU state. On many machines
(including ARMv6 CPUs) it's a
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