On 02/05/2011 08:39 AM, Stefan Weil wrote:
> Currently, most QEMU code assumes that pointers and long integers have
> the same size, typically 32 bit on 32 bit hosts, 64 bit on 64 bit hosts.
This is called the LP64 standard:
http://www.unix.org/whitepapers/64bit.html
Which was created for a re
On 11.02.2011, at 01:22, Alexander Graf wrote:
>
> On 11.02.2011, at 01:20, Alexander Graf wrote:
>
>>
>> On 10.02.2011, at 19:51, Scott Wood wrote:
>>
>>> On Thu, 10 Feb 2011 12:45:38 +0100
>>> Alexander Graf wrote:
>>>
Ok, thinking about this a bit more. You're basically proposing a
On 31 January 2011 16:20, Dmitry Eremin-Solenikov wrote:
> pxa2xx_pic duplicated some code from arm-pic. Drop it, replacing with
> references to arm-pic. Also use qdev/sysbus framework to handle
> pxa2xx-pic.
The duplication involves about 4 lines of code, at this level I
strongly prefer to not a
On Thu, 2011-02-10 at 16:52 +0800, Jan Kiszka wrote:
> On 2011-02-10 01:27, Huang Ying wrote:
> >>> @@ -1882,6 +1919,7 @@ int kvm_arch_on_sigbus_vcpu(CPUState *en
> >>> hardware_memory_error();
> >>> }
> >>> }
> >>> +kvm_hwpoison_page_add(ram_addr);
>
Hi Dmitry,
On 31 January 2011 16:20, Dmitry Eremin-Solenikov wrote:
> Signed-off-by: Dmitry Eremin-Solenikov
> ---
> hw/zaurus.c | 19 ++-
> 1 files changed, 18 insertions(+), 1 deletions(-)
>
> diff --git a/hw/zaurus.c b/hw/zaurus.c
> index fca11a5..90fedc9 100644
> --- a/hw/
On 11.02.2011, at 01:20, Alexander Graf wrote:
>
> On 10.02.2011, at 19:51, Scott Wood wrote:
>
>> On Thu, 10 Feb 2011 12:45:38 +0100
>> Alexander Graf wrote:
>>
>>> Ok, thinking about this a bit more. You're basically proposing a list of
>>> tlb set calls, with each array field identifying o
On 10.02.2011, at 19:51, Scott Wood wrote:
> On Thu, 10 Feb 2011 12:45:38 +0100
> Alexander Graf wrote:
>
>> Ok, thinking about this a bit more. You're basically proposing a list of
>> tlb set calls, with each array field identifying one tlb set call. What
>> I was thinking of was a full TLB sy
On Wed, Feb 09, 2011 at 09:07:52PM +0100, Anthony Liguori wrote:
> On 02/09/2011 06:35 PM, Aurelien Jarno wrote:
> >On Tue, Feb 08, 2011 at 04:08:28PM +0100, Aurelien Jarno wrote:
> >>Aurelien Jarno a écrit :
> >>>Paolo Bonzini a écrit :
> On 02/08/2011 12:15 PM, Aurelien Jarno wrote:
> >ho
This patch adds the main translation routine. All opcodes of the
LatticeMico32 processor are supported and translated to TCG ops.
Signed-off-by: Michael Walle
---
target-lm32/helper.c | 259 +
target-lm32/lm32-decode.h | 78 +++
target-lm32/translate.c | 1315 ++
This patch adds support for the LatticeMico32 system timer.
Signed-off-by: Michael Walle
---
Makefile.target |1 +
hw/lm32_timer.c | 227 +++
trace-events|6 ++
3 files changed, 234 insertions(+), 0 deletions(-)
create mode 100644
This patch adds translation helper functions.
Signed-off-by: Michael Walle
---
target-lm32/helper.h| 14 ++
target-lm32/op_helper.c | 106 +++
2 files changed, 120 insertions(+), 0 deletions(-)
create mode 100644 target-lm32/helper.h
creat
This patch adds the interrupt controller of the lm32. Because the PIC is
accessed through special control registers and opcodes, there are callbacks
from the lm32 translation code to this model.
Signed-off-by: Michael Walle
---
hw/lm32_pic.c | 191 +++
Add me as the lm32-target and machines maintainer.
Signed-off-by: Michael Walle
---
MAINTAINERS | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index ab48380..9f3ff0e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -70,6 +70,11 @@ M: E
This patch adds the JTAG UART model. It is accessed through special control
registers and opcodes. Therefore the translation uses callbacks to this
model.
Signed-off-by: Michael Walle
---
hw/lm32_juart.c | 151 +++
hw/lm32_juart.h | 10
This patch add support for the LatticeMico32 UART.
Signed-off-by: Michael Walle
---
Makefile.target |1 +
hw/lm32_uart.c | 292 +++
trace-events|5 +
3 files changed, 298 insertions(+), 0 deletions(-)
create mode 100644 hw/lm32_u
Signed-off-by: Michael Walle
---
configure | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 598e8e1..8ba7182 100755
--- a/configure
+++ b/configure
@@ -280,7 +280,7 @@ else
fi
case "$cpu" in
- alpha|cris|ia64|m68k|microblaze|ppc|pp
This patch creates tests/lm32 directory and adds tests for every
LatticeMico32 opcode.
Signed-off-by: Michael Walle
---
tests/Makefile|4 ++
tests/lm32/Makefile | 102 +
tests/lm32/crt.S | 84 ++
This patch add support for a system control block. It is supposed to
act as helper for the emulated program. E.g. shutting down the VM or
printing test results. This model is intended for testing purposes only and
doesn't fit to any real hardware. Therefore, it is not added to any board
by default.
This patch adds support for the LatticeMico32 softcore processor by Lattice
Semiconductor.
Signed-off-by: Michael Walle
---
Makefile.target|5 +
arch_init.c|2 +
arch_init.h| 13 ++--
cpu-exec.c | 13 +++-
elf.h |1 +
poison.h |
This patch adds init functions for the PIC and JTAG UART commonly used
in the board initialization.
Signed-off-by: Michael Walle
---
hw/lm32.h | 31 +++
1 files changed, 31 insertions(+), 0 deletions(-)
create mode 100644 hw/lm32.h
diff --git a/hw/lm32.h b/hw/lm32
This patch adds helper functions to create a ROM, which contains a hardware
description of a board. This is used in Theobromas LM32 Linux port.
Signed-off-by: Michael Walle
---
hw/lm32_hwsetup.h | 172 +
1 files changed, 172 insertions(+), 0 d
This patch adds support for saving and loading the processor state.
Signed-off-by: Michael Walle
---
target-lm32/machine.c | 33 +
1 files changed, 33 insertions(+), 0 deletions(-)
create mode 100644 target-lm32/machine.c
diff --git a/target-lm32/machine.c b/t
This patch adds support for the following two BSPs:
- LM32 EVR32 BSP (as used by RTEMS)
- uclinux BSP by Theobroma Systems
Signed-off-by: Michael Walle
---
Makefile.target |3 +
default-configs/lm32-softmmu.mak |4 +
hw/lm32_boards.c | 295
This patch adds general target documentation and a todo list.
Signed-off-by: Michael Walle
---
target-lm32/README | 46 ++
target-lm32/TODO |3 +++
2 files changed, 49 insertions(+), 0 deletions(-)
create mode 100644 target-lm32/README
create
This patch adds lm32 support to the gdbstub.
Signed-off-by: Michael Walle
---
gdbstub.c | 76 +
1 files changed, 76 insertions(+), 0 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index d6556c9..a4b37b7 100644
--- a/gdbstub.c
+++ b/
This patchset adds support for the LatticeMico32 softcore processor by
Lattice Semiconductor.
Changes since v1:
- removed variables which are no longer in use
- replaced some tcg ops with specialized ones
- kill VM in case of an unknown opcode
- fixed tracepoints format strings to match existi
Signed-off-by: Laurent Vivier
---
configure |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/configure b/configure
index 2bf7f34..b71035b 100755
--- a/configure
+++ b/configure
@@ -2902,6 +2902,7 @@ target_nptl="no"
interp_prefix1=`echo "$interp_prefix" | sed "s/%M/$tar
This is the v2 of my patch correcting the core dump format.
It introduces a new parameter of the target: the alignment size.
For the moment, it seems m68k is the only one that doesn't have 32bit
address alignment but 16bit one.
[PATCH 1/2] Define target alignment size
[PATCH 2/2] linux-user: corr
This patch allows to really use the core dumped by qemu with guest
architecture tools.
- it adds a missing bswap_phdr() for the program headers
of memory regions.
"objdump -x" sample:
BEFORE:
0x100 off0x0020 vaddr 0x0400 paddr 0x align 2**21
filesz 0x000
With recent gpxe eepro100 drivers, short packets are rejected,
so ensure the minimum ethernet packet size.
Signed-off-by: Bruce Rogers
---
slirp/slirp.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/slirp/slirp.c b/slirp/slirp.c
index 332d83b..b611cf7 100644
--- a/s
Am 10.02.2011 10:54, schrieb Paolo Bonzini:
On 02/09/2011 11:16 PM, Stefan Weil wrote:
The patch is available here:
http://repo.or.cz/w/qemu/ar7.git/commitdiff/aabf11dc0a938b84d76d7c147cbf0445d7bee297
[snip]
diff --git a/os-win32.c b/os-win32.c
index b214e6a..7778366 100644
--- a/os-win32.c
On Thu, 10 Feb 2011 19:22:38 +
Peter Maydell wrote:
> On 10 February 2011 19:17, Scott Wood wrote:
> > On Thu, 10 Feb 2011 08:16:15 +
> > Peter Maydell wrote:
> >> On 10 February 2011 07:47, Anthony Liguori wrote:
> >> > So very concretely, I'm suggesting we do the following to target-
Multimedia timers are only useful for compatibility with Windows NT 4.0
and earlier. Plus, the implementation in Wine is extremely heavyweight.
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
qemu-timer.c | 86 +++--
1 file
Here is the first part of my Win32 queue. With these patches, VNC
threads should work and only IPI is missing for iothread to work
as well.
Paolo Bonzini (7):
unlock iothread during WaitForMultipleObjects
implement win32 dynticks timer
use win32 timer queues
add win32 qemu-thread implemen
On Thu, Feb 10, 2011 at 03:47:14PM +, Peter Maydell wrote:
> Remove a stray #include from the middle of neon_helper.c:
> it was harmless but pointless since we include stdio.h at the top
> of the file anyway.
>
> Signed-off-by: Peter Maydell
> ---
> target-arm/neon_helper.c |1 -
> 1 fi
Instead of just returning -ENOTSUP, generate a more detailed error.
Unfortunately we don't have a helpful text for features that we don't know yet,
so just print the feature mask. It might be useful at least if someone asks for
help.
Signed-off-by: Kevin Wolf
Reviewed-by: Anthony Liguori
Acked-
The qcow2 driver is now declared responsible for any QCOW image that has
version 2 or greater (before this, version 3 would be detected as raw).
For everything newer than version 2, an error is reported.
Signed-off-by: Kevin Wolf
Reviewed-by: Anthony Liguori
---
block/qcow2.c | 13 ++
Signed-off-by: Kevin Wolf
Reviewed-by: Anthony Liguori
---
qerror.c |5 +
qerror.h |3 +++
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/qerror.c b/qerror.c
index 9d0cdeb..4855604 100644
--- a/qerror.c
+++ b/qerror.c
@@ -201,6 +201,11 @@ static const QErrorStringTabl
Remove a stray #include from the middle of neon_helper.c:
it was harmless but pointless since we include stdio.h at the top
of the file anyway.
Signed-off-by: Peter Maydell
---
target-arm/neon_helper.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/target-arm/neon_help
On Thu, Feb 10, 2011 at 04:25:11PM +0100, Alexander Graf wrote:
> Kevin O'Connor wrote:
> > On Tue, Feb 08, 2011 at 12:57:41AM +0100, Alexander Graf wrote:
> >> Do you remember why you put AHCI in with default=n? I'd like to see
> >> it enabled in Qemu 0.14 and IIUC we use the default configuration
Am 10.02.2011 18:37, schrieb Paolo Bonzini:
For now, qemu_cond_timedwait and qemu_mutex_timedlock are left as
POSIX-only functions. They can be removed later, once the patches
that remove their uses are in.
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
Makefile.objs | 4 +-
q
On Thu, Feb 10, 2011 at 03:04:28PM +0100, Anthony Liguori wrote:
> On 02/10/2011 02:27 PM, Gleb Natapov wrote:
> >I don't care how command line will look like, but I do not see how you
> >will support ide=off without device composition unless you put ad-hoc
> >ifs all over your i440fx device code.
On 02/10/2011 02:27 PM, Gleb Natapov wrote:
I don't care how command line will look like, but I do not see how you
will support ide=off without device composition unless you put ad-hoc
ifs all over your i440fx device code.
Yes, in the piix3 device code, the ide property would trigger an if(
On 02/10/2011 02:00 PM, Avi Kivity wrote:
On 02/10/2011 02:51 PM, Anthony Liguori wrote:
On 02/10/2011 12:13 PM, Gleb Natapov wrote:
Which spec? Even in this discussion we completely mixed different
things. 440FX is not a chipset.
Yes, it is. It's a single silicon package with a defined pin
On Thu, Feb 10, 2011 at 01:59:33PM +, Peter Maydell wrote:
> This patchset fixes some compilation failures which happen if you try to
> enable softfloat's USE_SOFTFLOAT_STRUCT_TYPES type-error-debugging switch.
>
> This patchset leaves one error in float16_to_float32, because
> that is fixed i
Hi,
Would be nice to have this in 0.14 - it is only documentation, and
fixing documentation inconsistency (html help contains all this parameters
already).
Alon
On Thu, Feb 10, 2011 at 03:23:05PM +0200, Alon Levy wrote:
> ---
> v2, now with matching parenthesis.
> ---
> qemu-options.hx | 14
On 10 February 2011 19:17, Scott Wood wrote:
> On Thu, 10 Feb 2011 08:16:15 +
> Peter Maydell wrote:
>> On 10 February 2011 07:47, Anthony Liguori wrote:
>> > So very concretely, I'm suggesting we do the following to target-i386:
>>
>> > 2) get rid of the entire concept of machines. Creatin
On Thu, 10 Feb 2011 12:45:38 +0100
Alexander Graf wrote:
> Ok, thinking about this a bit more. You're basically proposing a list of
> tlb set calls, with each array field identifying one tlb set call. What
> I was thinking of was a full TLB sync, so we could keep qemu's internal
> TLB representat
On Thu, 10 Feb 2011 08:16:15 +
Peter Maydell wrote:
> On 10 February 2011 07:47, Anthony Liguori wrote:
> > So very concretely, I'm suggesting we do the following to target-i386:
>
> > 2) get rid of the entire concept of machines. Creating a i440fx is
> > essentially equivalent to creating
On 10 February 2011 12:23, Anthony Liguori wrote:
> But something interacts with each processor and dispatches the I/O
> operations in the address space, no? I can't believe there are 2^32 address
> lines coming off of every arm chip that each device connects.
Well, the AXI bus is kind of compli
Amit Shah writes:
> This will be needed for hot-plugging chardevs.
>
> Signed-off-by: Amit Shah
> ---
> monitor.c |4 +---
> 1 files changed, 1 insertions(+), 3 deletions(-)
>
> diff --git a/monitor.c b/monitor.c
> index 7fc311d..f3d7ab3 100644
> --- a/monitor.c
> +++ b/monitor.c
> @@ -74,8
On Thu, Feb 10, 2011 at 12:55:22PM +0100, Alexander Graf wrote:
> Scott Wood wrote:
> > On Thu, 3 Feb 2011 10:19:06 +0100
> > Alexander Graf wrote:
> >
> >
> >> Yeah, that one's tricky. Usually the way the memory resolver in qemu works
> >> is as follows:
> >>
> >> * kvm goes to qemu
> >> *
Implement VMULL.P8 (the 32x32->64 version of the polynomial multiply
instruction).
Signed-off-by: Peter Maydell
---
target-arm/helpers.h |1 +
target-arm/neon_helper.c | 30 ++
target-arm/translate.c |6 --
3 files changed, 35 insertions(+), 2 dele
On 02/10/2011 11:38 AM, Peter Maydell wrote:
On 10 February 2011 10:13, Anthony Liguori wrote:
On 02/10/2011 10:04 AM, Peter Maydell wrote:
On 10 February 2011 08:36, Anthony Liguoriwrote:
So you would model arm926ej-s as the chipset and then build up the
machines
by mod
On 02/10/2011 11:10 AM, Gleb Natapov wrote:
On Thu, Feb 10, 2011 at 11:00:50AM +0100, Anthony Liguori wrote:
On 02/10/2011 10:07 AM, Gleb Natapov wrote:
So what if it is easier, it doesn't mean it is correct thing to do.
If we spend the next 10 years trying to do the "correct
2011/2/10 Daniel P. Berrange :
> On Thu, Feb 10, 2011 at 07:23:33PM +0900, Yoshiaki Tamura wrote:
>> 2011/2/10 Daniel P. Berrange :
>> > On Thu, Feb 10, 2011 at 10:54:01AM +0100, Anthony Liguori wrote:
>> >> On 02/10/2011 10:30 AM, Yoshiaki Tamura wrote:
>> >> >Currently FdMigrationState doesn't su
On 02/10/2011 09:47 AM, Anthony Liguori wrote:
So very concretely, I'm suggesting we do the following to target-i386:
1) make the i440fx device have an embedded ide controller, piix3, and
usb controller that get initialized automatically. The piix3 embeds
the PCI-to-ISA bridge along with all
On Thu, Feb 10, 2011 at 11:28:55AM +, Peter Maydell wrote:
> This patchset fixes two issues:
> * default_nan_mode not being honoured for float-to-float conversions
> * half precision conversions being broken in a number of ways as
>well as not handling default_nan_mode.
>
> With this pat
On Thu, Feb 10, 2011 at 10:04:57AM +0100, Tristan Gingold wrote:
> On Wed, Feb 09, 2011 at 07:52:52PM +0100, Aurelien Jarno wrote:
> >
> > What about moving tb_alloc() (with tb_free()) higher in the file? After
> > all it make sense to have the function creating or destructing a tb
> > before the
On Thu, Feb 10, 2011 at 11:00:50AM +0100, Anthony Liguori wrote:
> On 02/10/2011 10:07 AM, Gleb Natapov wrote:
> >So what if it is easier, it doesn't mean it is correct thing to do.
>
> If we spend the next 10 years trying to do the "correct thing" for
> some arbitrary definition of correct, that'
On 02/09/2011 11:16 PM, Stefan Weil wrote:
The patch is available here:
http://repo.or.cz/w/qemu/ar7.git/commitdiff/aabf11dc0a938b84d76d7c147cbf0445d7bee297
diff --git a/hosts/w32/include/signal.h b/hosts/w32/include/signal.h
new file mode 100644
index 000..e45f03c
--- /dev/null
+++ b/host
The following changes since commit 343c1de916b1841cd5fd5f813add9c87590d72e8:
x86: Fix MCA broadcast parameters for TCG case (2011-02-08 12:37:30 +0100)
are available in the git repository at:
git://gitorious.org/qemu-maemo/qemu.git linux-user-for-0.14
Martin Mohring (1):
linux-user: fi
Make deleting handlers robust against deletion of any elements in a
handler by using a deleted flag like in file descriptors.
Signed-off-by: Yoshiaki Tamura
---
vl.c | 13 +
1 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/vl.c b/vl.c
index ed2cdfa..00155fb 100644
---
For regular migration inuse == 0 always as requests are flushed before
save. However, event-tap log when enabled introduces an extra queue
for requests which is not being flushed, thus the last inuse requests
are left in the event-tap queue. Move the last_avail_idx value sent
to the remote back to
Signed-off-by: Yoshiaki Tamura
---
vl.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/vl.c b/vl.c
index 00155fb..f4d4abf 100644
--- a/vl.c
+++ b/vl.c
@@ -162,6 +162,7 @@ int main(int argc, char **argv)
#include "qemu-queue.h"
#include "cpus.h"
#include "arch_init.h
When ft_mode is set in the header, tcp_accept_incoming_migration()
sets ft_trans_incoming() as a callback, and call
qemu_file_get_notify() to receive FT transaction iteratively. We also
need a hack no to close fd before moving to ft_transaction mode, so
that we can reuse the fd for it. vm_change_
On 2011-02-10 18:37, Paolo Bonzini wrote:
> These are already present in the Win32 implementation, add them to
> the pthread wrappers as well.
Better use PTHREAD_MUTEX_ERRORCHECK.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
Currently buf size is fixed at 32KB. It would be useful if it could
be flexible.
Signed-off-by: Yoshiaki Tamura
---
hw/hw.h |2 ++
savevm.c | 20 +++-
2 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/hw/hw.h b/hw/hw.h
index 5e24329..a168a37 100644
--- a/hw/
On Thu, Feb 10, 2011 at 08:47:12AM +0100, Anthony Liguori wrote:
> On 02/09/2011 09:15 PM, Blue Swirl wrote:
> >On Wed, Feb 9, 2011 at 9:59 PM, Anthony Liguori
> >wrote:
> >>On 02/09/2011 06:48 PM, Blue Swirl wrote:
> ISASerialState dev;
>
> isa_serial_init(&dev, 0, 0x274, 0x07, NULL
On 10 February 2011 08:36, Anthony Liguori wrote:
> On 02/10/2011 09:16 AM, Peter Maydell wrote:
>> On 10 February 2011 07:47, Anthony Liguori wrote:
>>> 2) get rid of the entire concept of machines. Creating a i440fx is
>>> essentially equivalent to creating a bare machine.
>>
>> Does that make
On 02/09/2011 11:16 PM, Stefan Weil wrote:
I decided to create a new directory structure hosts/w32, so files can
be moved from the root to hosts/posix, hosts/w32, or hosts/xxx.
Include chains reduce code modifications and conditional compilations.
And people who don't want to see w32 support can
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
os-win32.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/os-win32.c b/os-win32.c
index 566d5e9..d907c59 100644
--- a/os-win32.c
+++ b/os-win32.c
@@ -140,7 +140,9 @@ void os_host_main_loop_wait(int *timeo
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
configure |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/configure b/configure
index 598e8e1..46a6389 100755
--- a/configure
+++ b/configure
@@ -2609,7 +2609,6 @@ if test "$vnc_png" != "no" ; then
fi
if
These are already present in the Win32 implementation, add them to
the pthread wrappers as well.
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
qemu-thread-posix.c | 20 +++-
qemu-thread-posix.h |1 +
2 files changed, 20 insertions(+), 1 deletions(-)
dif
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
qemu-timer.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/qemu-timer.c b/qemu-timer.c
index b0db780..42960de 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -1006,6 +1006,7 @@ static void win32_stop
For now, qemu_cond_timedwait and qemu_mutex_timedlock are left as
POSIX-only functions. They can be removed later, once the patches
that remove their uses are in.
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
Makefile.objs|4 +-
qemu-thread.c => q
Signed-off-by: Paolo Bonzini
Cc: Stefan Weil
Cc: Blue Swirl
---
cpus.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/cpus.c b/cpus.c
index 4c9928e..68b3fcb 100644
--- a/cpus.c
+++ b/cpus.c
@@ -32,6 +32,7 @@
#include "kvm.h"
#include "exec-all.h"
+#include "qemu-
On 02/10/2011 04:37 PM, Anthony Liguori wrote:
We're right around the corner from -rc2 so let's wait until after 0.14
is released so we have a full release cycle to test it.
And have unusable or only partly usable features (already mentioned
multiple times: boot order, AHCI) in 0.14?
Paolo
On Wed, 2011-02-09 at 16:00 +0800, Jan Kiszka wrote:
> On 2011-02-09 04:00, Huang Ying wrote:
> > In Linux kernel HWPoison processing implementation, the virtual
> > address in processes mapping the error physical memory page is marked
> > as HWPoison. So that, the further accessing to the virtual
If CONFIG_USE_GUEST_BASE is not defined, gcc complains:
linux-user/mmap.c:235: error: comparison of unsigned expression >= 0 is always
true
because RESERVED_VA is #defined to 0. Since mmap_find_vma_reserved()
will never be called anyway if RESERVED_VA is always 0, fix this by
simply #ifdef'ing a
On 02/10/2011 03:20 PM, Gleb Natapov wrote:
Jugging by how well all previous conversion went we will end up with one
more way of creating devices. One legacy, another qdev and your new one.
And what is the problem with qdev again (not that I am a big qdev fan)?
We've really been arguing abo
On 02/09/2011 06:35 PM, Aurelien Jarno wrote:
On Tue, Feb 08, 2011 at 04:08:28PM +0100, Aurelien Jarno wrote:
Aurelien Jarno a écrit :
Paolo Bonzini a écrit :
On 02/08/2011 12:15 PM, Aurelien Jarno wrote:
however
it should not be done ignoring all the*current* dra
Output the error message string of the bdrv_open return code. Also set a
non-empty device name for the images because the unknown feature error message
includes it.
Signed-off-by: Kevin Wolf
Reviewed-by: Anthony Liguori
---
qemu-img.c | 10 +++---
1 files changed, 7 insertions(+), 3 delet
When reading a compressed cluster failed, qcow2 falsely returned success.
Signed-off-by: Kevin Wolf
Reviewed-by: Markus Armbruster
---
block/qcow2-cluster.c |4 ++--
block/qcow2.c |4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/block/qcow2-cluster.c b/blo
From: Jes Sorensen
Pointed out by Markus
Signed-off-by: Jes Sorensen
Signed-off-by: Kevin Wolf
---
hmp-commands.hx |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index 38e1eb7..372bef4 100644
--- a/hmp-commands.hx
+++ b/hmp-commands
On Wed, Feb 09, 2011 at 03:42:31PM +, Peter Maydell wrote:
> This patchset fixes the VQMOV(U)N instructions (saturating narrowing
> conversions). Tested by random generation of instructions for
> VQMOVN, VQMOVUN, VMOVN.
>
> Patch 1/2 is the same as the one Christophe sent recently but I have
>
When copying L2 tables (this happens only with internal snapshots), the order
wasn't completely safe, so that after a crash you could end up with a L2 table
that has too low refcount, possibly leading to corruption in the long run.
This patch puts the operations in the right order: First allocate
From: Chunqiang Tang
This patch fixes the following bug in QCOW2. For a QCOW2 image that is larger
than its base image, when handling a read request straddling over the end of the
base image, the QCOW2 driver attempts to read beyond the end of the base image
and the request would fail.
This bug
On Wed, Feb 09, 2011 at 04:27:30PM +, Peter Maydell wrote:
> The Neon half-precision conversion operations (VCVT.F16.F32 and
> VCVT.F32.F16) use ARM standard floating-point arithmetic, unlike
> the VFP versions (VCVTB and VCVTT).
>
> Signed-off-by: Peter Maydell
> ---
> target-arm/helper.c
From: Markus Armbruster
Should have spotted this when doing commit 319ae529.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
blockdev.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index 24d7658..0690cc8 100644
--- a
From: Markus Armbruster
Started leaking in commit 1dae12e6.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
blockdev.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index ecfadc1..24d7658 100644
--- a/blockdev.c
+++ b/blockdev.
The following changes since commit 6c5f738daec123020d32543fe90a6633a4f6643e:
microblaze: Handle singlestepping over direct jmps (2011-02-10 00:46:09 +0100)
are available in the git repository at:
git://repo.or.cz/qemu/kevin.git for-anthony
Chunqiang Tang (1):
QCOW2: bug fix - read base
Requests could return success even though they failed when bdrv_aio_readv
returned NULL for a backing file read.
Reported-by: Chunqiang Tang
Signed-off-by: Kevin Wolf
---
block/qcow2.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
inde
On 02/10/2011 04:25 PM, Alexander Graf wrote:
Kevin O'Connor wrote:
On Tue, Feb 08, 2011 at 12:57:41AM +0100, Alexander Graf wrote:
Hi Kevin,
Do you remember why you put AHCI in with default=n? I'd like to see
it enabled in Qemu 0.14 and IIUC we use the default configuration
for tha
Kevin O'Connor wrote:
> On Thu, Feb 10, 2011 at 04:25:11PM +0100, Alexander Graf wrote:
>
>> Kevin O'Connor wrote:
>>
>>> On Tue, Feb 08, 2011 at 12:57:41AM +0100, Alexander Graf wrote:
>>>
Do you remember why you put AHCI in with default=n? I'd like to see
it enabled in Qe
Kevin O'Connor wrote:
> On Tue, Feb 08, 2011 at 12:57:41AM +0100, Alexander Graf wrote:
>
>> Hi Kevin,
>>
>> Do you remember why you put AHCI in with default=n? I'd like to see
>> it enabled in Qemu 0.14 and IIUC we use the default configuration
>> for that.
>>
>
> Hi Alex,
>
> Sorry - I've
On Tue, Feb 08, 2011 at 12:57:41AM +0100, Alexander Graf wrote:
> Hi Kevin,
>
> Do you remember why you put AHCI in with default=n? I'd like to see
> it enabled in Qemu 0.14 and IIUC we use the default configuration
> for that.
Hi Alex,
Sorry - I've gotten behind on emails.
The reason for not e
qemu 0.14.0 rc1
Not in qemu-doc.html:
(qemu) info spice
BTW: The qemu instanz crashed with "info spice":
kvm ReactOS.img -spice port=12345,disable-ticketing -vga qxl -monitor
stdio'''
(qemu) info spice
Server:
address: 0.0.0.0:12345
auth: none
qemu: qdict.c:193: qdict_get_obj: As
This patch fixes two things:
1) CHECK POWER MODE
The error return value wasn't always zero, so it would show up as
offline. Error is now explicitly set to zero.
2) SMART
The smart values that were returned were invalid and tools like skdump
would not recognize that the smart data was act
On Wed, 2011-02-09 at 17:22 -0600, Ryan Harper wrote:
> * Brian Wheeler [2011-02-09 16:13]:
> > This patch fixes two things:
> >
> > 1) CHECK POWER MODE
> >
> > The error return value wasn't always zero, so it would show up as
> > offline. Error is now explicitly set to zero.
> >
> > 2) SMAR
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