Signed-off-by: liguang
---
hw/sd/sdhci.c |2 +-
hw/sd/sdhci.h | 312
include/hw/sdhci.h | 312
3 files changed, 313 insertions(+), 313 deletions(-)
delete mode 100644 hw/sd/s
I see QEMU TLB is organized by access modes, e.g. in emulating X86,
there are 3 modes.
#define MMU_MODE0_SUFFIX _kernel
#define MMU_MODE1_SUFFIX _user
#define MMU_MODE2_SUFFIX _ksmap /* Kernel with SMAP override */
Why can not QEMU have a global TLB for all modes ?
Xin
On 12/25/2013 02:43 AM, Michael S. Tsirkin wrote:
> On Wed, Dec 25, 2013 at 01:15:29AM +1100, Alexey Kardashevskiy wrote:
>> On 12/24/2013 08:40 PM, Michael S. Tsirkin wrote:
>>> On Tue, Dec 24, 2013 at 02:09:07PM +1100, Alexey Kardashevskiy wrote:
On 12/24/2013 03:24 AM, Michael S. Tsirkin wr
Thanks, Peter ... will do, definitely have Linux and can use it to test in the
future before reporting other bugs. That said, I think you can close this one.
-peter
On Dec 23, 2013, at 6:43 PM, Peter Maydell wrote:
> Ah, I hadn't tried -nographic. However, my general point still stands:
> whet
Season's greetings all:
The OASIS Virtual I/O Device (VIRTIO) TC [1] members have recently approved
a Committee Specification Draft (CSD) and submitted this specification for
30-day(*) public review:
Virtual I/O Device (VIRTIO) Version 1.0
Committee Specification Draft 01 / Public Review Draft 01
On Dec 24, 2013, at 6:22 AM, Mark Cave-Ayland
wrote:
> On 23/12/13 21:00, Peter Bartoli wrote:
>
>>> I currently have patches for a CG3 framebuffer pending that will enable
>>> you to boot Solaris into graphics mode, which I hope will be applied soon.
>>
>> That is AWESOME news. Really, I'm h
On Tue, Dec 24, 2013 at 06:04:12PM +0100, Andreas Färber wrote:
> From: Markus Armbruster
>
> In an ideal world, machines can be built by wiring devices together
> with configuration, not code. Unfortunately, that's not the world we
> live in right now. We still have quite a few devices that ne
From: xiaoqiang zhao
Do some cleanup, including:
1. Remove DO_UPCAST() for APICCommonState
2. Change DeviceState pointers from 'd' to 'dev', better to understand
3. Rename 'register_types' to specifically 'apic_common_register_types'
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
From: xiaoqiang zhao
Some cleanups:
* ioapic_common.c: Rename 'register_types' to 'ioapic_common_register_types'
* Replace inline 'DEVICE(s)' with local 'DeviceState *dev' variable
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/i386/kvm/ioapic.c| 4 +++-
hw/intc/ioapic
From: Markus Armbruster
Many PCI host bridges consist of a sysbus device and a PCI device.
You need both for the thing to work. Arguably, these bridges should
be modelled as a single, composite devices instead of pairs of
seemingly independent devices you can only use together, but we're not
the
From: Markus Armbruster
Once upon a time, the error message was:
qemu: -device nonexistant: Device "nonexistant" not found. Try -device '?'
for a list.
But progress marches on, and conversion to QError (commit 0204276)
changed it into:
Invalid parameter 'driver'
Try with argument
From: Markus Armbruster
Such devices have always been unavailable and omitted from the list of
available devices shown by device_add help. Until commit 18b6dad
silently broke the former, setting up nasty traps for unwary users,
like this one:
$ qemu-system-x86_64 -nodefaults -monitor stdio
From: Markus Armbruster
An ICH9 southbridge contains several PCI devices, some of them with
multiple functions. We model each function as a separate qdev. Two
of them need some special wiring set up in pc_q35_init() to work: the
LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3.
S
From: Markus Armbruster
Watch this:
$ upstream-qemu -nodefaults -S -display none -monitor stdio
QEMU 1.7.50 monitor - type 'help' for more information
(qemu) device_add rng-egd
/work/armbru/qemu/qdev-monitor.c:491:qdev_device_add: Object 0x2089b00 is
not an instance of type devi
From: xiaoqiang zhao
For consistency, QOM'ify APIC's parent bus.
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/cpu/icc_bus.c | 14 ++
hw/intc/apic_common.c| 13 +++--
include/hw/cpu/icc_bus.h | 2 +-
3 files changed, 14 insertions(+), 15 d
From: Markus Armbruster
A PIIX3/PIIX4 southbridge has multiple functions. We model each
function as a separate qdev. Two of them need some special wiring set
up in pc_init1() or mips_malta_init() to work: the ISA bridge at 01.0,
and the SMBus controller at 01.3.
The IDE controller at 01.1 (pii
From: xiaoqiang zhao
Convert 'init' function to QOM's 'realize' for ioapic and kvm-ioapic.
Change variable 'ioapic_no' from static to global. Then we can drop
the 'instance_no' function argument.
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/i386/kvm/ioapic.c
From: xiaoqiang zhao
Convert 'init' function to QOM's 'realize' for apic, kvm/apic and
xen/xen_apic.
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/i386/kvm/apic.c | 6 --
hw/intc/apic.c | 6 --
hw/intc/apic_common.c | 2 +-
From: Igor Mammedov
Add basic regression testing for QOM Interface usage.
Test checks casting to interface type/class for following cases:
- interface implementation in leaf class
- interface implementation in intermediate (parent) class
Signed-off-by: Igor Mammedov
Signed-off-by: Andreas F
From: Markus Armbruster
Drop it when there's no obvious reason why device_add could not work.
Else keep and document why.
* isa-fdc: drop
* i8042: drop, even though its I/O base is hardcoded (because you
could conceivably still add one to a board that has none), and even
though PC board cod
From: Paolo Bonzini
There should be no need to look up nor enumerate the interface "types",
whose "classes" are really just vtables. Just create the types and
add them to the interface list of the parent type.
Interfaces not registering their type anymore means that accessing
superclass::interf
From: Markus Armbruster
Ask users of DEFINE_PROP_PTR() to set
cannot_instantiate_with_device_add_yet, or explain why it's not
needed.
Signed-off-by: Markus Armbruster
Signed-off-by: Andreas Färber
---
include/hw/qdev-properties.h | 17 +
1 file changed, 17 insertions(+)
diff
From: Markus Armbruster
Once upon a time, the error message was:
qemu: -device nonexistant: Device "nonexistant" not found. Try -device '?'
for a list.
But progress marches on, and conversion to QError (commit 0204276)
changed it into:
Invalid parameter 'driver'
Try with argument
From: Markus Armbruster
Signed-off-by: Markus Armbruster
Reviewed-by: Peter Maydell
Signed-off-by: Andreas Färber
---
qom/cpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/qom/cpu.c b/qom/cpu.c
index 09c15e6..9d62479 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -254,
From: Markus Armbruster
A VT82C686B southbridge has multiple functions. We model each
function as a separate qdev. One of them need some special wiring set
up in mips_fulong2e_init() to work: the ISA bridge at 05.0.
The IDE controller at 05.1 (via-ide) has always had
cannot_instantiate_with_de
From: Markus Armbruster
device_add plugs devices into suitable bus. For "real" buses, that
actually connects the device. For sysbus, the connections need to be
made separately, and device_add can't do that. The device would be
left unconnected, and could not possibly work.
Quite a few, but no
From: Hervé Poussineau
We should not modify the type hash table while it is being iterated on.
Assert that it does not happen.
Signed-off-by: Hervé Poussineau
Signed-off-by: Paolo Bonzini
Signed-off-by: Alexey Kardashevskiy
Signed-off-by: Andreas Färber
---
qom/object.c | 5 +
1 file ch
From: Stefan Hajnoczi
Same reasoning as commit 02a5c4c97422b40034f31265e0f139f7846172a8
("qdev: Drop misleading qdev_free() function"). The qbus_free()
function removes the child from the namespace and decrements the
reference count. It does not, however, guarantee to free the child
since the r
From: Peter Crosthwaite
The object-cast and class-cast caches cannot be shared because class
caching is conditional on the target type not being an interface and
object caching is unconditional. Leads to a bug when a class cast
to an interface follows an object cast to the same interface type:
F
From: xiaoqiang zhao
Do some cleanup, including:
1. Remove DO_UPCAST() for APICCommonState
2. Change DeviceState pointers from 'd' to 'dev', better to understand
3. Rename 'register_types' to specifically 'apic_common_register_types'
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
From: Markus Armbruster
Pointer properties can be set only by code, not by device_add. A
device with a pointer property can work with device_add only when the
property may remain null.
This is the case for property "interrupt_vector" of device
"etraxfs,pic". Add a comment there.
Set cannot_in
From: Markus Armbruster
Signed-off-by: Markus Armbruster
Reviewed-by: Peter Maydell
Signed-off-by: Andreas Färber
---
hw/intc/apic_common.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index ea420c7..aaef054 100644
---
From: xiaoqiang zhao
Convert 'init' function to QOM's 'realize' for ioapic and kvm-ioapic.
Change variable 'ioapic_no' from static to global. Then we can drop
the 'instance_no' function argument.
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/i386/kvm/ioapic.c
From: Markus Armbruster
Watch this:
$ upstream-qemu -nodefaults -S -display none -monitor stdio
QEMU 1.7.50 monitor - type 'help' for more information
(qemu) device_add rng-egd
/work/armbru/qemu/qdev-monitor.c:491:qdev_device_add: Object 0x2089b00 is
not an instance of type devi
Am 24.12.2013 17:56, schrieb Andreas Färber:
> Hello Anthony,
>
> This is my QOM (devices) patch queue. Please pull.
>
> Happy holidays,
>
> Andreas
>
> P.S. I reproducibly get a signal message:
> TEST: tests/acpi-test... (pid=6364)
> /i386/acpi/tcg:
Hello Anthony,
This is my fixed QOM (devices) patch queue. Please pull.
Happy holidays,
Andreas
P.S. I reproducibly get a signal message:
TEST: tests/acpi-test... (pid=6364)
/i386/acpi/tcg:
main-loop: WARNING: I/O thread spun for 1000 iter
From: Markus Armbruster
Ask users of DEFINE_PROP_PTR() to set
cannot_instantiate_with_device_add_yet, or explain why it's not
needed.
Signed-off-by: Markus Armbruster
Signed-off-by: Andreas Färber
---
include/hw/qdev-properties.h | 17 +
1 file changed, 17 insertions(+)
diff
From: Markus Armbruster
In an ideal world, machines can be built by wiring devices together
with configuration, not code. Unfortunately, that's not the world we
live in right now. We still have quite a few devices that need to be
wired up by code. If you try to device_add such a device, it'll
From: xiaoqiang zhao
Convert 'init' function to QOM's 'realize' for apic, kvm/apic and
xen/xen_apic.
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/i386/kvm/apic.c | 6 --
hw/intc/apic.c | 6 --
hw/intc/apic_common.c | 2 +-
From: Paolo Bonzini
There should be no need to look up nor enumerate the interface "types",
whose "classes" are really just vtables. Just create the types and
add them to the interface list of the parent type.
Interfaces not registering their type anymore means that accessing
superclass::interf
From: xiaoqiang zhao
For consistency, QOM'ify APIC's parent bus.
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/cpu/icc_bus.c | 14 ++
hw/intc/apic_common.c| 13 +++--
include/hw/cpu/icc_bus.h | 2 +-
3 files changed, 14 insertions(+), 15 d
From: xiaoqiang zhao
Some cleanups:
* ioapic_common.c: Rename 'register_types' to 'ioapic_common_register_types'
* Replace inline 'DEVICE(s)' with local 'DeviceState *dev' variable
Signed-off-by: xiaoqiang zhao
Signed-off-by: Andreas Färber
---
hw/i386/kvm/ioapic.c| 4 +++-
hw/intc/ioapic
From: Markus Armbruster
Pointer properties can be set only by code, not by device_add. A
device with a pointer property can work with device_add only when the
property may remain null.
This is the case for property "interrupt_vector" of device
"etraxfs,pic". Add a comment there.
Set cannot_in
From: Markus Armbruster
In an ideal world, machines can be built by wiring devices together
with configuration, not code. Unfortunately, that's not the world we
live in right now. We still have quite a few devices that need to be
wired up by code. If you try to device_add such a device, it'll
From: Stefan Hajnoczi
Same reasoning as commit 02a5c4c97422b40034f31265e0f139f7846172a8
("qdev: Drop misleading qdev_free() function"). The qbus_free()
function removes the child from the namespace and decrements the
reference count. It does not, however, guarantee to free the child
since the r
From: Markus Armbruster
Such devices have always been unavailable and omitted from the list of
available devices shown by device_add help. Until commit 18b6dad
silently broke the former, setting up nasty traps for unwary users,
like this one:
$ qemu-system-x86_64 -nodefaults -monitor stdio
From: Markus Armbruster
A PIIX3/PIIX4 southbridge has multiple functions. We model each
function as a separate qdev. Two of them need some special wiring set
up in pc_init1() or mips_malta_init() to work: the ISA bridge at 01.0,
and the SMBus controller at 01.3.
The IDE controller at 01.1 (pii
From: Igor Mammedov
Add basic regression testing for QOM Interface usage.
Test checks casting to interface type/class for following cases:
- interface implementation in leaf class
- interface implementation in intermediate (parent) class
Signed-off-by: Igor Mammedov
Signed-off-by: Andreas F
From: Markus Armbruster
An ICH9 southbridge contains several PCI devices, some of them with
multiple functions. We model each function as a separate qdev. Two
of them need some special wiring set up in pc_q35_init() to work: the
LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3.
S
From: Peter Crosthwaite
The object-cast and class-cast caches cannot be shared because class
caching is conditional on the target type not being an interface and
object caching is unconditional. Leads to a bug when a class cast
to an interface follows an object cast to the same interface type:
F
From: Hervé Poussineau
We should not modify the type hash table while it is being iterated on.
Assert that it does not happen.
Signed-off-by: Hervé Poussineau
Signed-off-by: Paolo Bonzini
Signed-off-by: Alexey Kardashevskiy
Signed-off-by: Andreas Färber
---
qom/object.c | 5 +
1 file ch
From: Markus Armbruster
Drop it when there's no obvious reason why device_add could not work.
Else keep and document why.
* isa-fdc: drop
* i8042: drop, even though its I/O base is hardcoded (because you
could conceivably still add one to a board that has none), and even
though PC board cod
From: Markus Armbruster
A VT82C686B southbridge has multiple functions. We model each
function as a separate qdev. One of them need some special wiring set
up in mips_fulong2e_init() to work: the ISA bridge at 05.0.
The IDE controller at 05.1 (via-ide) has always had
cannot_instantiate_with_de
From: Markus Armbruster
Signed-off-by: Markus Armbruster
Reviewed-by: Peter Maydell
Signed-off-by: Andreas Färber
---
hw/intc/apic_common.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index ea420c7..aaef054 100644
---
From: Markus Armbruster
Signed-off-by: Markus Armbruster
Reviewed-by: Peter Maydell
Signed-off-by: Andreas Färber
---
qom/cpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/qom/cpu.c b/qom/cpu.c
index 09c15e6..9d62479 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -254,
From: Markus Armbruster
Many PCI host bridges consist of a sysbus device and a PCI device.
You need both for the thing to work. Arguably, these bridges should
be modelled as a single, composite devices instead of pairs of
seemingly independent devices you can only use together, but we're not
the
Hello Anthony,
This is my QOM (devices) patch queue. Please pull.
Happy holidays,
Andreas
P.S. I reproducibly get a signal message:
TEST: tests/acpi-test... (pid=6364)
/i386/acpi/tcg:
main-loop: WARNING: I/O thread spun for 1000 iterations
From: Markus Armbruster
device_add plugs devices into suitable bus. For "real" buses, that
actually connects the device. For sysbus, the connections need to be
made separately, and device_add can't do that. The device would be
left unconnected, and could not possibly work.
Quite a few, but no
On 12/18/2013 12:19 PM, Tom Musta wrote:
> +if (unlikely(tp##_is_any_nan(xa.fld[i]) ||
> \
> + tp##_is_any_nan(xb.fld[i]))) {
> \
> +if (tp##_is_signaling_nan(xa.fld[i])) {
> \
On 12/18/2013 12:49 PM, Tom Musta wrote:
> This patch adds the Load Floating Point as Integer Word and
> Zero Indexed (lfiwzx) instruction which was introduced in
> Power ISA 2.06.
>
> Signed-off-by: Tom Musta
> ---
> target-ppc/translate.c | 15 +++
> 1 files changed, 15 insertion
On 12/18/2013 12:49 PM, Tom Musta wrote:
> The frsqrtes instruction was introduced prior to ISA 2.06 and is
> support on both the Power7 and Power8 processors. However, this
> instruction is handled as illegal in the current QEMU emulation
> machines. This patch enables the existing implemention
On 12/18/2013 12:49 PM, Tom Musta wrote:
> +static void gen_ftsqrt(DisasContext *ctx)
> +{
> +TCGv_i32 bf;
> +if (unlikely(!ctx->fpu_enabled)) {
> +gen_exception(ctx, POWERPC_EXCP_FPU);
> +return;
> +}
> +/* NIP cannot be restored if the memory exception comes from a
On 12/18/2013 12:49 PM, Tom Musta wrote:
> +env->crf[bf] = 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0);
> +}
You should return that value instead of assigning it. Then you need neither
the env nor bf arguments, and the whole function can be TCG_CALL_NO_RWG_SE.
> +static void gen_ftdiv(DisasC
mmit f976b09ea2493fd41c98aaf6512908db0bae:
PPC: Fix compilation with TCG debug (2013-12-22 19:15:55 +0100)
are available in the git repository at:
git://github.com/juanquintela/qemu.git tags/migration/20131224
for you to fetch changes up to bc864a4f0ce79a8f4c09bc479a81c5f919ee48f6:
ram: a
On 12/18/2013 12:49 PM, Tom Musta wrote:
> The fri* series of instructions was introduced prior to ISA 2.06 and
> is supported on Power7 and Power8 hardware. However, the instruction
> is still considered illegal in the P7 and P8 QEMU emulation models.
> This patch enables these instructions for t
On 12/18/2013 12:49 PM, Tom Musta wrote:
> +#define FPU_FCFI(op, cvtr, is_single) \
> +uint64_t helper_##op(CPUPPCState *env, uint64_t arg) \
> +{ \
> +CPU_DoubleU farg; \
> +
On Wed, Dec 25, 2013 at 01:15:29AM +1100, Alexey Kardashevskiy wrote:
> On 12/24/2013 08:40 PM, Michael S. Tsirkin wrote:
> > On Tue, Dec 24, 2013 at 02:09:07PM +1100, Alexey Kardashevskiy wrote:
> >> On 12/24/2013 03:24 AM, Michael S. Tsirkin wrote:
> >>> On Mon, Dec 23, 2013 at 02:01:13AM +1100,
On 12/18/2013 12:49 PM, Tom Musta wrote:
> This patch adds the four floating point to integer conversion instructions
> introduced by Power ISA V2.06:
>
> - Floating Convert to Integer Word Unsigned (fctiwu)
> - Floating Convert to Integer Word Unsigned with Round Toward
> Zero (fctiwuz)
>
On 12/18/2013 12:49 PM, Tom Musta wrote:
> This patch adds the byte and halfword variants of the Store Conditional
> instructions. A common macro is introduced and the existing implementations
> of stwcx. and stdcx. are re-implemented using this macro.
>
> V2: Re-implemented gen_conditional_stor
On 12/23/2013 12:10 PM, Alexander Graf wrote:
>
> On 23.12.2013, at 19:08, Andreas Färber wrote:
>
>> Am 20.12.2013 02:00, schrieb Alexander Graf:
>>
>> Alex, we now have those meaningless-without-context commit messages in
>> qemu.git history. I'm pretty sure I asked the contributor nicely to
On 12/18/2013 12:48 PM, Tom Musta wrote:
> This patch adds the byte and halfword variations of the Load and
> Reserve instructions. Since there is much commonality among
> all forms of Load and Reserve, a common macro is provided and the
> existing implementations of lwarx and ldarx are re-implem
On 12/18/2013 12:48 PM, Tom Musta wrote:
> +tcg_gen_div_i64(cpu_gpr[rD(ctx->opcode)], ra, rb);
> \
> +tmp0 = tcg_temp_local_new();
> \
> +/* does the result fit in 32 bits? */
> \
On 12/18/2013 12:48 PM, Tom Musta wrote:
> +*plow = result;
> +*phigh = dividend % divisor;
> +return (result > INT64_MAX) | (result < INT64_MIN);
Probably better as
return result != *plow;
Otherwise,
Reviewed-by: Richard Henderson
r~
On 12/18/2013 12:48 PM, Tom Musta wrote:
> This patch adds the Divide Doubleword Extended Unsigned
> instructions. This instruction requires dividing a 128-bit
> value by a 64 bit value. Since 128 bit integer division is
> not supported in TCG, a helper is used, providing a
> repeated difference
On 12/18/2013 12:48 PM, Tom Musta wrote:
> +DEF_HELPER_3(bpermd, i64, env, i64, i64)
Should be DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> +uint64_t helper_bpermd(CPUPPCState *env, uint64_t rs, uint64_t rb)
> +{
> +int i;
> +uint64_t ra = 0;
> +
> +for (i = 0; i <
On 12/18/2013 12:48 PM, Tom Musta wrote:
> This patch adds a flag for base instruction additions to Power ISA
> 2.06B. The flag will be used to identify/select basic Book I and
> Book II instructions that were newly added in that revision of the
> architecture. The flag will not be used for VSX o
Juan Quintela wrote:
D> Hi
>
> First of all, poll told to move the call earlier.
>
> 9:00 EST (15:00 CET or 6:00 Pacific)
>
>
> Are we having a call on the 24th? Do we have any topics? Are enough
> people not on vacation?
I guess that christmas win, and no call.
Have a happy Christmas and vaca
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> Now that setcondi is used instead of branches, temp_local are not needed
> anymore.
>
> Signed-off-by: Aurelien Jarno
> ---
> target-sh4/translate.c | 10 +++---
> 1 file changed, 3 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderso
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> Signed-off-by: Aurelien Jarno
> ---
> target-sh4/translate.c | 18 ++
> 1 file changed, 6 insertions(+), 12 deletions(-)
Reviewed-by: Richard Henderson
r~
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> Signed-off-by: Aurelien Jarno
> ---
> target-sh4/translate.c |1 -
> 1 file changed, 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 24 December 2013 13:03, Andreas Färber wrote:
> Am 23.12.2013 17:08, schrieb Peter Maydell:
>> On 8 December 2013 22:59, Peter Maydell wrote:
>>> This patchset is a collection of minor Cocoa UI patches:
>>> * the 'pass command key through when mousegrabbed' patch I sent
>>>earlier (includ
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> static void gen_read_sr(TCGv dst)
> {
> -tcg_gen_andi_i32(dst, cpu_sr, ~(1u << SR_T));
> -tcg_gen_or_i32(dst, dst, cpu_sr_t);
> +TCGv t0 = tcg_temp_new();
> +tcg_gen_andi_i32(dst, cpu_sr,
> + ~((1u << SR_Q) | (1u
On 12/17/2013 05:37 PM, Alexey Kardashevskiy wrote:
> On 12/04/2013 04:34 PM, Alexey Kardashevskiy wrote:
>> On 11/16/2013 03:58 AM, Alexey Kardashevskiy wrote:
>>> On 16.11.2013 0:15, Alexander Graf wrote:
Am 15.11.2013 um 00:12 schrieb Alexey Kardashevskiy :
> At the momen
On 23/12/13 23:50, Peter Maydell wrote:
The 32-bit SPARC emulator's TCX emulation seems to work with
OpenBIOS, but doesn't work with a SparcStation ROM on Cocoa
This is actually two separate issues.
(1) This SS-5 ROM doesn't boot on QEMU. You can see this if
you try it on a Linux host : the d
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> +TCGv t0 = tcg_const_i32(0);
> +tcg_gen_add2_i32(REG(B11_8), cpu_sr_t,
> + REG(B7_4), t0, cpu_sr_t, t0);
> +tcg_gen_sub2_i32(REG(B11_8), cpu_sr_t,
> + t0, t0,
On 23/12/13 21:00, Peter Bartoli wrote:
I currently have patches for a CG3 framebuffer pending that will enable
you to boot Solaris into graphics mode, which I hope will be applied soon.
That is AWESOME news. Really, I'm hoping to just have a text-based
console like on my SS5 with the old fam
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> Signed-off-by: Aurelien Jarno
> ---
> target-sh4/translate.c | 15 ++-
> 1 file changed, 6 insertions(+), 9 deletions(-)
Reviewed-by: Richard Henderson
r~
Hi Vasiliy,
On Mon, Dec 23, 2013 at 01:58:12PM +0400, Vasiliy Tolstov wrote:
> Hi all. I need to write some qemu block driver (like sheepdog or ceph).
> Where i can find some docs/tips/tutorials what functions i need to implement?
> Thank you.
I haven't taken the time to look at it yet, but there
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> +t2 = tcg_temp_new();
> +tcg_gen_add2_i32(t1, t2, REG(B11_8), t0, REG(B7_4), t0);
> +tcg_gen_add2_i32(REG(B11_8), cpu_sr_t, t1, t2, cpu_sr_t, t0);
FWIW, one can avoid an extra temporary by consuming cpu_sr_t in the
On 12/24/2013 08:40 PM, Michael S. Tsirkin wrote:
> On Tue, Dec 24, 2013 at 02:09:07PM +1100, Alexey Kardashevskiy wrote:
>> On 12/24/2013 03:24 AM, Michael S. Tsirkin wrote:
>>> On Mon, Dec 23, 2013 at 02:01:13AM +1100, Alexey Kardashevskiy wrote:
On 12/23/2013 01:46 AM, Alexey Kardashevskiy
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> +static inline target_ulong cpu_read_sr(CPUSH4State *env)
> +{
> +return (env->sr & ~(1u << SR_T)) | (env->sr_t << SR_T);
> +}
> +
> +static inline void cpu_write_sr(CPUSH4State *env, target_ulong sr)
> +{
> +env->sr_t = sr & (1u << SR_T);
> +
On 12/22/2013 03:50 AM, Aurelien Jarno wrote:
> Use the bit number for SR constants instead of using a bit mask. This
> make possible to also use the constants for shifts.
>
> Signed-off-by: Aurelien Jarno
> ---
> target-sh4/cpu.c |3 +-
> target-sh4/cpu.h | 30 +---
On 23/12/13 20:02, Andreas Färber wrote:
So the issue is actually that the OHW binary is really messed up.
And me, Hervé and Mark have been working on getting OpenBIOS working for
PReP in its place.
It may be worth adding that when Hervé's latest patches are applied to
OpenBIOS SVN trunk (cur
On 12/17/2013 05:25 PM, Juan Quintela wrote:
Move index and size fields from int to long. We need that for
migration. long is 64 bits on sane architectures, and 32bits should
be enough on all the 32bits architectures.
Signed-off-by: Juan Quintela
---
include/qemu/bitmap.h | 77 +
Am 23.12.2013 17:08, schrieb Peter Maydell:
> On 8 December 2013 22:59, Peter Maydell wrote:
>> This patchset is a collection of minor Cocoa UI patches:
>> * the 'pass command key through when mousegrabbed' patch I sent
>>earlier (included here for convenience since the others in
>>the se
From: Igor Mammedov
Features family, model, stepping, level, hv_spinlocks are treated similarly
when passed from command line, so it's not necessary to handle each of them
individually. Collapse them to one catch-all branch which will treat
any not explicitly handled feature in format 'foo=val'.
From: Igor Mammedov
Signed-off-by: Igor Mammedov
Signed-off-by: Andreas Färber
---
target-i386/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0e00a8a..7d5b58c 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -173
From: Igor Mammedov
Signed-off-by: Igor Mammedov
Signed-off-by: Andreas Färber
---
target-i386/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index e20b0c8..0e00a8a 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -173
From: Igor Mammedov
Features check, enforce, hv_relaxed and hv_vapic are treated as boolean
set to 'on' when passed from command line, so it's not necessary to
handle each of them separately. Collapse them to one catch-all branch
which will treat any feature in format 'foo' as boolean set to 'on'
From: Igor Mammedov
Signed-off-by: Igor Mammedov
Signed-off-by: Andreas Färber
---
target-i386/cpu.c | 45 -
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 7d5b58c..39c57f8 100644
--- a/targe
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