27.03.2014 20:14, Alejandro Comisario wrote:
> Seems like virtio (kvm 1.0) doesnt expose timeout on the guest side
> (ubuntu 12.04 on host and guest).
> So, how can i adjust the tinmeout on the guest ?
After a bit more talks on IRC yesterday, it turned out that the situation
is _much_ more "intere
On Thu, Mar 27, 2014 at 05:09:45PM +0800, Fam Zheng wrote:
> Signed-off-by: Fam Zheng
> ---
> block.c | 30 --
> include/block/block.h | 4
> 2 files changed, 32 insertions(+), 2 deletions(-)
>
> diff --git a/block.c b/block.c
> index 6b82bf0..0abc
hi, Qasim:
pls refer to 'qemu-options.hx' and the big switch in 'vl.c'.
Thanks,
Jules.
At 2014-03-28 14:25:43,"Qasim Maqbool" wrote:
Hi,
I need to add a few command line options to QEMU. However, I am yet to
determine how QEMU takes input from the command line and parses the optio
Kiyokazu SUTO writes:
> Citation (with leading "> " of each line) from article:
> <8761mzq0wl@blackfin.pond.sub.org>
> by Markus Armbruster :
>> Your fix is correct, but the patch doesn't pass checkpatch, it doesn't
>> have a proper commit message, and it lacks your S-o-B. Since the f
Hi all!
There seems to be a problem with the emulation of the mtmsr instruction:
According to the PowerISA spec, chapter Book III-S, the mtmsr opcode
has a so-called "L" field at bit position 15. Looking at the function
gen_mtmsr() in target-ppc/translate.c, the bit is taken into account
since t
Eric Blake writes:
> On 03/27/2014 02:03 AM, Wenchao Xia wrote:
>> This file holds some functions that do not need to be generated.
>>
>> Signed-off-by: Wenchao Xia
>> ---
>> include/qapi/qmp-event.h | 27 +
>> qapi/Makefile.objs |1 +
>> qapi/qmp-event.c |
Eric Blake writes:
> On 03/27/2014 09:33 AM, Benoît Canet wrote:
>> This patch is here to pave the way for the JSON include directive which
>> will need to do include loop detection.
>>
>
> Would also be nice to mention that it improves the error message
> quality. While 3/3 is definitely 2.1 m
On Fri, Mar 28, 2014 at 11:01:00AM +0400, Michael Tokarev wrote:
> 27.03.2014 20:14, Alejandro Comisario wrote:
> > Seems like virtio (kvm 1.0) doesnt expose timeout on the guest side
> > (ubuntu 12.04 on host and guest).
> > So, how can i adjust the tinmeout on the guest ?
>
> After a bit more ta
Stefan Weil writes:
> Am 27.03.2014 20:49, schrieb Jeff Cody:
>> On Wed, Mar 26, 2014 at 10:38:05PM +0100, Stefan Weil wrote:
>>> (1) block_size must not be null.
>>>
>>> (2) blocks_in_image * 4 must fit into a size_t.
>>>
>>> (3) blocks_in_image * block_size must fit into a uint64_t.
>>>
>>> Hea
> > >> Return error for migrate cancel, when migration status is not
> > >> MIG_STATE_SETUP or MIG_STATE_ACTIVE. Thus, libvirt can can
> > >> perceive the operation fails.
> > >>
> > >> Signed-off-by: zengjunliang
> > >> Signed-off-by: Gonglei
> > >
> > > I think this is done on purpose, because
Il 28/03/2014 10:18, Gonglei (Arei) ha scritto:
> > Can you please give more details at how you are triggering the problem
> > with libvirt? I think Paolo is probably right - the bug is more likely
> > to be in libvirt not expecting the race and not recovering correctly
> > when the race occurs,
On 15.03.2014 03:48, Richard Henderson wrote:
> We don't need the FP within translated code, and the LR is
> otherwise unused.
>
> Signed-off-by: Richard Henderson
The downside of this is that it disregards the procedure call standard from ARM.
Peter what do you think about this?
> ---
> tcg/
v3:
* Add Stefan Weil's test-aio fix patch [Stefan Weil]
* Patch 3 commit description s/The causes targets/This causes make targets/
[Stefan Weil]
v2:
* Use ifeq instead of using *-n [Andreas]
make check is broken on mingw32 builds because we the CONFIG_POSIX checks are
outdated. This series
From: Stefan Weil
test_timer_schedule and test_source_timer_schedule don't compile for MinGW
because some functions are not implemented for MinGW (qemu_pipe,
aio_set_fd_handler).
Signed-off-by: Stefan Weil
Signed-off-by: Stefan Hajnoczi
---
tests/test-aio.c | 16
1 file chang
qtest test cases only work on POSIX hosts. The following line only
defines dependencies for qtest binaries on POSIX hosts:
check-qtest-$(CONFIG_POSIX)=$(foreach
TARGET,$(TARGETS),$(check-qtest-$(TARGET)-y))
But the QTEST_TARGETS definition earlier in the Makefile fails to check
CONFIG_POSIX.
test-rfifolock and test-vmstate only build on POSIX hosts. Exclude them
if building for Windows.
Signed-off-by: Stefan Hajnoczi
---
tests/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/Makefile b/tests/Makefile
index 2d021fb..ef286e7 100644
--- a/tests/Ma
On Thu, Mar 27, 2014 at 08:58:38PM +0100, Stefan Weil wrote:
> Am 27.03.2014 19:52, schrieb Jeff Cody:
> >> Do we need this patch for QEMU 2.0? For 32 bit systems, the image size
> >> limit is 1000 TB, and that image would need 4 GB for the block cache in
> >> memory. Are such image sizes used anyw
On 21.03.2014 13:06, Paolo Bonzini wrote:
Il 21/03/2014 12:49, Peter Lieven ha scritto:
A 10G logical volume was created and filled with random data.
Then the logical volume was exported via qemu-img convert to an iscsi target.
Before the export was started all caches of the linux kernel where d
this patch implements a cache that tracks if a page on the
iscsi target is allocated or not. The cache is implemented in
a way that it allows for false positives
(e.g. pretending a page is allocated, but it isn't), but
no false negatives.
The cached allocation info is then used to speed up the
rea
> Am 28.03.2014 um 16:16 schrieb Thomas Huth :
>
>
> Hi all!
>
> There seems to be a problem with the emulation of the mtmsr instruction:
> According to the PowerISA spec, chapter Book III-S, the mtmsr opcode
> has a so-called "L" field at bit position 15. Looking at the function
> gen_mtmsr()
Hi,
This serie addresses the comments made on v5. The main goal is to share
most of the code to support both the current legacy virtio and the yet
to come 1.0 implementations.
The changes since the last post are:
- introduce a per-device property to supersede the
evil virtio_byteswap global
- p
From: Rusty Russell
virtio data structures are defined as "target endian", which assumes
that's a fixed value. In fact, that actually means it's platform-specific.
The OASIS virtio 1.0 spec will fix this, by making all little endian.
We need to support both implementations and we want to share
From: Rusty Russell
Signed-off-by: Rusty Russell
Reviewed-by: Anthony Liguori
[ use per-device needs_byteswap flag,
Greg Kurz ]
Signed-off-by: Greg Kurz
---
hw/char/virtio-serial-bus.c | 39 +++
1 file changed, 23 insertions(+), 16 deletions(-)
diff -
From: Rusty Russell
Signed-off-by: Rusty Russell
Reviewed-by: Anthony Liguori
[ use per-device needs_byteswap flag,
Greg Kurz ]
Signed-off-by: Greg Kurz
---
hw/virtio/virtio-balloon.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/virtio-balloon.c b/hw/
From: Rusty Russell
Signed-off-by: Rusty Russell
Reviewed-by: Anthony Liguori
[ use per-device needs_byteswap flag,
Greg Kurz ]
Signed-off-by: Greg Kurz
---
hw/net/virtio-net.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw
From: Rusty Russell
Note that st*_raw and ld*_raw are effectively replaced by st*_p and ld*_p.
Signed-off-by: Rusty Russell
Reviewed-by: Anthony Liguori
[ use per-device needs_byteswap flag,
Greg Kurz ]
Signed-off-by: Greg Kurz
---
hw/block/virtio-blk.c | 40 +++-
From: Rusty Russell
Note that st*_raw and ld*_raw are effectively replaced by st*_p and ld*_p.
Signed-off-by: Rusty Russell
Reviewed-by: Anthony Liguori
[ use per-device needs_byteswap flag,
fix missing tswap32 in virtio_scsi_push_event(),
Greg Kurz ]
Signed-off-by: Greg Kurz
---
hw/scs
Note that st*_raw and ld*_raw are effectively replaced by st*_p and ld*_p.
Signed-off-by: Greg Kurz
---
hw/9pfs/virtio-9p-device.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/9pfs/virtio-9p-device.c b/hw/9pfs/virtio-9p-device.c
index 15a4983..c758500 100644
--- a/
Richard Henderson writes:
> On 03/27/2014 09:37 AM, alex.ben...@linaro.org wrote:
>> From: Alex Bennée
>>
>> This allows the perf tool to map samples to each individual translation
>> block. This could be expanded for user space but currently it gives
>> enough information to find any hotblock
Peter Maydell writes:
> Improve the clarity of the message QEMU prints when the user
> doesn't specify a machine model to use and there is no default.
>
> Signed-off-by: Peter Maydell
> ---
> vl.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/vl.c b/vl.c
> index 23
Peter Maydell writes:
> -.is_default = 1,
Reviewed-by: Alex Bennée
--
Alex Bennée
Qasim Maqbool writes:
> Hi,
>
> I need to add a few command line options to QEMU. However, I am yet to
> determine how QEMU takes input from the command line and parses the option
> values. I have tried looking at various files including vl.c and cmd.c but
> nothing seems to work right now.
>
>
We base it on the OS endian, as reflected by the endianness of the
interrupt vectors (handled through the ILE bit in the LPCR register).
Using first_cpu to fetch the registers from KVM may look arbitrary
and awkward, but it is okay because KVM sets/unsets the ILE bit on
all CPUs.
Suggested-by: Be
From: Rusty Russell
This is based on a simpler patch by Anthony Liguouri, which only handled
the vring accesses. We also need some drivers to access these helpers,
eg. for data which contains headers.
Signed-off-by: Rusty Russell
[ ldq_phys() API change,
use per-device needs_byteswap flag,
On 28 March 2014 11:17, Alex Bennée wrote:
>
> Peter Maydell writes:
>
>
>> -.is_default = 1,
>
>
> Reviewed-by: Alex Bennée
Bit late, this was applied to master yesterday :-)
thanks
-- PMM
Ping. (Since this is a bug fix, I think it can go into 2.0)
-Don Slutz
On 03/18/14 12:29, Don Slutz wrote:
The commit 88c1ee73d3231c74ff90bcfc084a7589670ec244
char/serial: Fix emptyness check
Still causes extra NULL byte(s) to be sent.
So if the fifo is empty, do not send an extra NULL by
On Fri, 28 Mar 2014 18:25:02 +0800
Alexander Graf wrote:
>
>
> > Am 28.03.2014 um 16:16 schrieb Thomas Huth :
> >
> >
> > Hi all!
> >
> > There seems to be a problem with the emulation of the mtmsr instruction:
> > According to the PowerISA spec, chapter Book III-S, the mtmsr opcode
> > has
From: "Dr. David Alan Gilbert"
Warn if no way of setting thread name is available.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
configure| 28
util/qemu-thread-posix.c | 21 +++
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Il 28/03/2014 10:18, Gonglei (Arei) ha scritto:
> >>> > Can you please give more details at how you are triggering the problem
> >>> > with libvirt? I think Paolo is probably right - the bug is more likely
> >>> > to be in libvirt not expecting the ra
From: Marcel Apfelbaum
Commit 8dcf525abc5dff785251a881f9764dd961065c0d
acpi-build: append description for non-hotplug
appended description for all occupied non hotpluggable PCI slots.
However the bridge devices are already added to SSDT,
adding them again will create an incorrect SSDT table.
Il 28/03/2014 12:30, Dr. David Alan Gilbert ha scritto:
> Another reason for doing it in libvirt is that the serialization
> between cancellation and completion of migration ultimately is
> controlled by libvirt's lock. Doing this in QEMU makes it harder to
> reason about concurrency.
I think y
On Thu, Mar 27, 2014 at 09:59:21AM +, Alex Bennée wrote:
>
> Leandro Dorileo writes:
>
> > On Wed, Mar 26, 2014 at 02:37:12PM +, alex.ben...@linaro.org wrote:
> >> From: Alex Bennée
> >>
> >> When debugging stuff that occurs over several forks it would be useful
> >> not to keep overwr
The following changes since commit 7f6613cedc59fa849105668ae971dc31004bca1c:
target-mips: fix MTHC1 and MFHC1 when FPU in FR=0 mode (2014-03-25 23:36:35
+0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch chan
Il 28/03/2014 12:43, Don Slutz ha scritto:
Ping. (Since this is a bug fix, I think it can go into 2.0)
-Don Slutz
I think the problem is that not many people understand the 8250 device
model. CCing someone who hopefully does...
Paolo
On 03/18/14 12:29, Don Slutz wrote:
The commit 88
From: Matt Lupfer
A HPET timer can be started when HPET is not yet
enabled. This will not generate an interrupt
to the guest, but causes problems when HPET is later
enabled.
A timer that is created and expires at least once before
HPET is enabled will have an initialized comparator based
on a hp
On Thu, 27 Mar 2014, alex.ben...@linaro.org wrote:
> From: Alex Bennée
>
> This allows the perf tool to map samples to each individual translation
> block. This could be expanded for user space but currently it gives
> enough information to find any hotblocks by other means.
I'm in favor of t
This introduces an NMI (non maskable interrupt) callback per CPU class
which QMP's "nmi" command may use to issue NMI on a CPU.
Signed-off-by: Alexey Kardashevskiy
---
hmp-commands.hx | 4 +---
include/qom/cpu.h | 1 +
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/hmp-commands
This adds an NMI handler per CPUs. x86, s390 and ppc CPUS are supported.
The change to existing behaviour is that x86 only delivers NMI to
the current monitored CPU now, not to every CPU.
Please comment. Thanks.
Changes:
v2:
* moved from machine interface to CPUClass callback
* s390 and x86 move
Signed-off-by: Alexey Kardashevskiy
---
cpus.c | 33 +++--
1 file changed, 7 insertions(+), 26 deletions(-)
diff --git a/cpus.c b/cpus.c
index 1104d61..2c8d620 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1469,33 +1469,14 @@ exit:
void qmp_inject_nmi(Error **errp)
{
-#if
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/cpu-qom.h| 1 +
target-ppc/excp_helper.c| 2 +-
target-ppc/translate_init.c | 18 ++
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 47dc8e6..b522664 1
Hi Amos,
On Thu, Mar 27, 2014 at 09:04:31PM +0800, Amos Kong wrote:
> All the options are defined in qemu-options.hx. If we can't find a
> matched option definition by group name of option table, then the
> group name doesn't match with defined option name, it's not allowed
> from 2.0
>
> Signed-
Signed-off-by: Alexey Kardashevskiy
---
target-s390x/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index dfd83e8..89470a2 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -156,6 +156,11 @@ static void s390_cpu_full_reset(CPUStat
Signed-off-by: Alexey Kardashevskiy
---
target-i386/cpu.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 8fd1497..35f20e0 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2489,6 +2489,19 @@ static void x86_cpu_reset(CPUSta
On 03/28/2014 02:48 AM, Claudio Fontana wrote:
> On 15.03.2014 03:48, Richard Henderson wrote:
>> We don't need the FP within translated code, and the LR is
>> otherwise unused.
>>
>> Signed-off-by: Richard Henderson
>
> The downside of this is that it disregards the procedure call standard from
The arm ldrd/strd insns must cause alignment traps, whereas
at least for armv7 ldr/str must handle unaligned operations.
While this is hardly the only problem facing user-only emu,
this solves one problem for i386 on armv7 emulation.
Reviewed-by: Peter Maydell
Reported-by: Huw Davies
Signed-off
On 03/28/2014 04:12 AM, Alex Bennée wrote:
> Do we have a format macro for target_ulong?
TCG_PRIlx or TCG_PRIld.
r~
On 03/28/2014 04:12 AM, Alex Bennée wrote:
> I've had a brief poke around the TCG profiling and seen it track
> generation cost. Do we have any hotblock tracking in the built-in profiler?
No.
r~
On Thu, 27 Mar 2014 22:55:46 +0100
Hani Benhabiles wrote:
> On Thu, Mar 27, 2014 at 04:21:51PM -0400, Luiz Capitulino wrote:
> >
> > I think this patch has to be split into at least three patches. One for
> > the drive_del change (which is unrelated with the other stuff), one
> > converting devi
On Fri, Mar 28, 2014 at 10:07:22AM +0100, Stefan Hajnoczi wrote:
> On Thu, Mar 27, 2014 at 08:58:38PM +0100, Stefan Weil wrote:
> > Am 27.03.2014 19:52, schrieb Jeff Cody:
> > >> Do we need this patch for QEMU 2.0? For 32 bit systems, the image size
> > >> limit is 1000 TB, and that image would nee
Just the one unaligned related patch to sneek in under the wire.
r~
The following changes since commit 9c5793c5036c7608ff2c87846c6d11f904c08b58:
Merge remote-tracking branch 'remotes/afaerber/tags/ppc-for-2.0' into staging
(2014-03-27 17:08:30 +)
are available in the git repository at
Initialize the dbs->in_cancel flag in dma_bdrv_io(), since qemu_aio_get()
does not return zero-initialized memory. Spotted by the clang sanitizer
(which complained when the value loaded in dma_complete() was not valid
for a bool type); this might have resulted in leaking the AIO block.
Signed-off-
On Wed, Mar 26, 2014 at 2:55 PM, Paolo Bonzini wrote:
> Il 26/03/2014 14:42, Paolo Bonzini ha scritto:
>
>> QOM casts are only typesafe inasmuch as we know that the argument is
>> a QOM object. If it is not, the accesses to fields in Object can
>> access invalid memory and thus cause a segfault.
Amos Kong writes:
> All the options are defined in qemu-options.hx. If we can't find a
> matched option definition by group name of option table, then the
> group name doesn't match with defined option name, it's not allowed
> from 2.0
>
> Signed-off-by: Amos Kong
> ---
> qemu-options.h | 1
Hi Mark,
It still seems to me that the problem is somewhere *within* the qemu tree but
specific to all MacOSX hosts, and not to my individual build environment. I
have done some further research and I found for example
http://www.emaculation.com/doku.php/ppc-osx-on-qemu-for-osx
It lists my exac
Add casts when we're performing arithmetic on the .hi parts of an
Int128, to avoid undefined behaviour.
Signed-off-by: Peter Maydell
---
include/qemu/int128.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qemu/int128.h b/include/qemu/int128.h
index 9ed47aa..f597
On 03/28/2014 08:55 AM, Markus Armbruster wrote:
> Amos Kong writes:
>
>> All the options are defined in qemu-options.hx. If we can't find a
>> matched option definition by group name of option table, then the
>> group name doesn't match with defined option name, it's not allowed
>> from 2.0
>>
On Fri, 28 Mar 2014 15:15:46 +0100
Thomas Huth wrote:
> On Fri, 28 Mar 2014 11:57:17 +0100
> Greg Kurz wrote:
>
> > From: Rusty Russell
> >
> > virtio data structures are defined as "target endian", which assumes
> > that's a fixed value. In fact, that actually means it's platform-specific.
>
On 03/28/2014 06:04 AM, Markus Armbruster wrote:
> Amos Kong writes:
>
> Taking a step back: quite a few command line options make sense only in
> certain build configurations. We deal with that in several different
> ways:
>
> 1. Target-specific options: qemu-options.hx declares a target mask
These three patches provide more fixes for undefined behaviour
spotted by the clang sanitizer when doing "make check" runs.
I don't think these need to go into 2.0; I'm just sending them
out now so I don't forget about them...
Peter Maydell (3):
hw/ide/ahci.c: Avoid shift left into sign bit
in
Am 28.03.2014 16:29, schrieb Peter Maydell:
> Avoid stores to unaligned addresses in TCG code generation, by using the
> usual memcpy() approach. (Using bswap.h would drag a lot of QEMU baggage
> into TCG, so it's simpler just to do direct memcpy() here.)
>
> Signed-off-by: Peter Maydell
Reviewe
CPU address spaces touching load and store helpers as well as the
movement of (almost) all fields from CPU_COMMON to CPUState have led to
a noticeable increase of CPU() usage in "hot" paths for both TCG and KVM.
While CPU()'s OBJECT_CHECK() might help detect development errors, i.e. in
form of cra
The maximum blocks_in_image is 0x / 4, which also limits the
maximum disk_size for a VDI image to 1024TB. Note that this is the maximum
size that QEMU will currently support with this driver, not necessarily the
maximum size allowed by the image format.
This also fixes an incorrect error
Implement the AArch64 RVBAR register, which indicates the reset
address. Since the reset address is implementation defined and
usually configurable by setting config signalso in hardware, we
also provide a QOM property so it can be set at board level if
necessary.
Signed-off-by: Peter Maydell
---
From: Steven Noonan
The -fstack-protector flag family is useful for ensuring safety and for
debugging, but has a performance impact. Here are some boot time comparisons of
the various versions of -fstack-protector using qemu-system-arm on an x86_64
host:
# -fstack-protector-all
Startup f
For AArch32 exceptions, the only information provided about
the cause of an exception is the individual exception type (data
abort, undef, etc), which we store in cs->exception_index. For
AArch64, the CPU provides much more detail about the cause of
the exception, which can be found in the syndrome
This is v2 of the patches from Stefan Hajnoczi's pull request for CVE patches.
Changes from v1:
Patch 1: * Use DEFAULT_CLUSTER_SIZE instead of new
VDI_BLOCK_SIZE (thanks Stefan Weil)
* More informative error messages (thanks Stefan Weil)
* Return -ENOT
This test checks for proper bounds checking of some VDI input
headers. The following is checked:
1. Max image size (1024TB) with the appropriate Blocks In Image
value (0x3fff) is detected as valid.
2. Image size exceeding max (1024TB) is seen as invalid
3. Valid image size but with Block
This doesn't just dump CPU state on translation but on every block
entrance.
Signed-off-by: Alex Bennée
diff --git a/qemu-log.c b/qemu-log.c
index 797f2af..35bbb56 100644
--- a/qemu-log.c
+++ b/qemu-log.c
@@ -105,7 +105,7 @@ const QEMULogItem qemu_log_items[] = {
{ CPU_LOG_EXEC, "exec",
Use unsigned types for doing bitwise arithmetic in the xzbrle
calculations, to avoid undefined behaviour:
xbzrle.c:99:49: runtime error: left shift of 72340172838076673
by 7 places cannot be represented in type 'long'
Signed-off-by: Peter Maydell
---
xbzrle.c | 8 +---
1 file changed, 5 i
In ARMv8 the 32 bit coprocessor ID register space is tidied up to
remove the wildcarded aliases of the MIDR and the RAZ behaviour
for the unassigned space where crm = 3..7. Make sure we don't
expose thes wildcards for v8 cores. This means we need to have
a specific implementation for REVIDR, an IMP
For ARMv8 there are two changes to the MVFR media feature registers:
* there is a new MVFR2 which is accessible from 32 bit code
* 64 bit code accesses these via the usual sysreg instructions
rather than with a floating-point specific instruction
Implement this.
Signed-off-by: Peter Maydell
Add Cortex-A57 processor.
Signed-off-by: Peter Maydell
---
target-arm/cpu64.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index d4fb1de..5be7d72 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@
Implement the AArch64 address translation operations.
Signed-off-by: Peter Maydell
---
target-arm/cpu.h| 3 +--
target-arm/helper.c | 53 -
2 files changed, 25 insertions(+), 31 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.
When debugging big programs or system emulation sometimes you want both
the verbosity of cpu,exec et all but don't want to generate lots of logs
for unneeded stuff. This patch adds a new option -dfilter which allows
you to specify interesting address ranges in the form:
-dfilter 0x8000-0x9000,0x
Because unallocated encodings generate different exception syndrome
information from traps due to FP being disabled, we can't do a single
"is fp access disabled" check at a high level in the decode tree.
To help in catching bugs where the access check was forgotten in some
code path, we set this fl
The Cortex-A57, like most of the other ARM cores, has a CBAR
register which defines the base address of the per-CPU
peripherals. However it has a 64-bit view as well as a
32-bit view; expand the QOM reset-cbar property from UINT32
to UINT64 so this can be specified, and implement the
32-bit and 64-
Support the Cortex-A57 in the virt machine model.
Signed-off-by: Peter Maydell
---
This should perhaps not be just stealing the a15mpcore_priv
on the basis that it's a GICv2...
---
hw/arm/virt.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 2bbc9
Don't hardcode TCG_TARGET_WORDS_BIGENDIAN.
Signed-off-by: Andreas Färber
---
Unfortunately with this fix, execution of ./i386-softmmu/qemu-system-i386
just gets a SIGSEGV instead of the previous SIGILL on ppc64le.
This TCG breakage affects acpi-test, failing make check.
tcg/ppc64/tcg-target
From: Rob Herring
Add support for v8 page table walks. This supports stage 1 translations
for 4KB, 16KB and 64KB page sizes starting with 0 or 1 level.
Signed-off-by: Rob Herring
[PMM: fix style nits, fold in 16/64K page support patch, use
arm_el_is_aa64() to decide whether to do 64 bit page t
Implement handling for the AArch64 SP_EL0 system register.
This holds the EL0 stack pointer, and is only accessible when
it's not being used as the stack pointer, ie when we're in EL1
and EL1 is using its own stack pointer. We also provide a
definition of the SP_EL1 register; this isn't guest visib
The first patch make an error path in the test more explicit.
The second make the qapi generator script take their input as non option
argument.
It's done to be able to do cycle detection in the next patch.
The third create an include directive for QAPI JSON files.
The purpose of this series is
From: Kevin Wolf
free_cluster_index is only correct if update_refcount() was called from
an allocation function, and even there it's brittle because it's used to
protect unfinished allocations which still have a refcount of 0 - if it
moves in the wrong place, the unfinished allocation can be corr
Kirill Batuzov writes:
> On Thu, 27 Mar 2014, alex.ben...@linaro.org wrote:
>
>> From: Alex Bennée
>>
>> This allows the perf tool to map samples to each individual translation
>> block. This could be expanded for user space but currently it gives
>> enough information to find any hotblocks by
Here's v5 of the AArch64 system emulation patchset.
Still missing/TODO:
* haven't dealt with the use of a15mpcore_priv in the virt
machine patch yet; Peter C's suggestion in review on v4 is
probably the right thing, I just haven't got to it yet
* SMP support (needs PSCI emulation in QEMU; b
Move arm_log_exception() into internals.h so we can use it from
helper-a64.c for the AArch64 exception entry code.
Signed-off-by: Peter Maydell
---
target-arm/helper.c| 31 ---
target-arm/internals.h | 31 +++
2 files changed, 31 insert
Currently cpu.h defines a mixture of functions and types needed by
the rest of QEMU and those needed only by files within target-arm/.
Split the latter out into a new header so they aren't needlessly
exposed further than required.
Signed-off-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
---
From: Rob Herring
Set up the required syndrome information when we detect an MMU fault.
Signed-off-by: Rob Herring
[PMM: split out from exception handling patch, tweaked to bring
in line with how we create other kinds of syndrome information]
Signed-off-by: Peter Maydell
---
target-arm/helpe
When debugging stuff that occurs over several forks it would be useful
not to keep overwriting the one logfile you've set-up. This allows a
simple %d to be included once in the logfile parameter which is
substituted with getpid().
Signed-off-by: Alex Bennée
Reviewed-by: Leandro Dorileo
diff --g
Implement AArch64 view of the CONTEXTIDR register.
We tighten up the condition when we flush the TLB on a CONTEXTIDR
write to avoid needlessly flushing the TLB every time on a 64
bit system (and also on a 32 bit system using LPAE, as a bonus).
Signed-off-by: Peter Maydell
---
target-arm/cpu.h
Hi,
Peter has also made some tweaks so I've pulled those from his tree to
shepherd them through the review process as they are all related. I've
also added a new -d nochain option for easier tracing of execution
(although it does hit performance quite heavily).
Since the RFC:
- added Peter'
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