Hello,
I’d like to simulate mouse/keyboard input events to a qemu guest. I am planning
to hijack the sdl_refresh function in ui/sdl.c. Is that the right approach?
Also, is there a way to build QEMU as a library that can be called from another
application that can send such inputs?
- Manoj
-Original Message-
From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
Sent: Tuesday, January 20, 2015 1:19 AM
To: Xu, Quan
Cc: qemu-devel@nongnu.org; xen-de...@lists.xen.org;
stefano.stabell...@eu.citrix.com
Subject: Re: [v3 3/5] Qemu-Xen-vTPM: Register Xen stubdom
There are user complaints on guest's unresponsiveness when ioctl is blocked due
to the lost connection to backend or other issues. This series changes scsi
request processing of virtio-blk to an asynchronous manner.
Fam Zheng (2):
virtio-blk: Pass req to virtio_blk_handle_scsi_req
In preparation for calling blk_aio_ioctl. Also make the function static
as no other files need it.
Signed-off-by: Fam Zheng f...@redhat.com
---
hw/block/virtio-blk.c | 9 +
include/hw/virtio/virtio-blk.h | 3 ---
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git
On 2015/1/19 19:36, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
From: Michael S. Tsirkin m...@redhat.com
Xen wants to supply a different pci and host devices,
inheriting i440fx devices. Make types configurable.
Description is misleading, this isn't about xen but
On 2015/1/19 19:40, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
+static void xen_igd_passthrough_i440fx_class_init(ObjectClass *klass,
+ void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+dc-desc = IGD
-Original Message-
From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
Sent: Tuesday, January 20, 2015 1:15 AM
To: Xu, Quan
Cc: qemu-devel@nongnu.org; xen-de...@lists.xen.org;
stefano.stabell...@eu.citrix.com
Subject: Re: [v3 3/5] Qemu-Xen-vTPM: Register Xen stubdom
Add AArch32 to AArch64 register sychronization functions.
Replace manual register synchronization with new functions in
aarch64_cpu_do_interrupt() and HELPER(exception_return)().
Signed-off-by: Greg Bellows greg.bell...@linaro.org
---
target-arm/helper-a64.c | 5 +--
target-arm/internals.h |
On 2015/1/19 21:58, Michael S. Tsirkin wrote:
On Mon, Jan 19, 2015 at 12:57:18PM +0100, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
Currently IGD drivers always need to access PCH by 1f.0. But we
Obvious question: q35?
q35 already has a isa bridge @ 0x1f.0.
Use the asynchronous interface of ioctl. This will not make the VM
unresponsive if the ioctl takes a long time.
Signed-off-by: Fam Zheng f...@redhat.com
---
hw/block/virtio-blk.c | 125 +++---
1 file changed, 79 insertions(+), 46 deletions(-)
diff
Add 32-bit to/from 64-bit register synchronization on register gets and puts.
Set EL1_32BIT feature flag passed to KVM
Signed-off-by: Greg Bellows greg.bell...@linaro.org
---
target-arm/kvm64.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git
On Mon, Jan 19, 2015 at 11:30:51AM -0800, Richard Henderson wrote:
On 01/19/2015 11:00 AM, Peter Maydell wrote:
Alternatively (better!), for a lot of the tlb_flush()es triggered
by target-arm code we could be more precise about the affected
mmu_idx values, since the common case is going to
-Original Message-
From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
Sent: Tuesday, January 20, 2015 1:15 AM
To: Xu, Quan
Cc: qemu-devel@nongnu.org; xen-de...@lists.xen.org;
stefano.stabell...@eu.citrix.com
Subject: Re: [v3 2/5] Qemu-Xen-vTPM: Xen frontend driver
On 2015/1/19 19:36, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
From: Michael S. Tsirkin m...@redhat.com
Xen wants to supply a different pci and host devices,
inheriting i440fx devices. Make types configurable.
Description is misleading, this isn't about xen but
On 2015/1/20 12:28, Jike Song wrote:
On 01/20/2015 10:52 AM, Chen, Tiejun wrote:
On 2015/1/19 19:40, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
+static void xen_igd_passthrough_i440fx_class_init(ObjectClass *klass,
+
Adjust the kernel load offset by 0x8000 if not a zImage.
Signed-off-by: Pranavkumar Sawargaonkar address@hidden
Signed-off-by: Greg Bellows greg.bell...@linaro.org
---
hw/arm/boot.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git
On 2015/1/19 19:45, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
+DEF(gfx_passthru, 0, QEMU_OPTION_gfx_passthru,
+-gfx_passthru enable Intel IGD passthrough by XEN\n,
+QEMU_ARCH_ALL)
+STEXI
+@item -gfx_passthru
+@findex -gfx_passthru
+Enable Intel IGD
On Mon, Jan 12, 2015 at 9:32 AM, Bharata B Rao
bhar...@linux.vnet.ibm.com wrote:
1st patch fixes PC DIMMs capacity calculation and the 2nd patch does
code movement so that pc_existing_dimms_capacity() can be used by
other architectures.
Bharata B Rao (2):
pc: Fix DIMMs capacity calculation
Adds a CPU feature parsing function and assigns to the CPU class. The only
feature added was -aarch64 which disabled the AArch64 execution state on a
64-bit ARM CPU.
Also adds stripping of features from CPU model string in acquiring the ARM CPU
by name.
Signed-off-by: Greg Bellows
Added machvirt parsing of feature keywords added to the -cpu command line
option. Parsing occurs during machine initialization.
Signed-off-by: Greg Bellows greg.bell...@linaro.org
---
hw/arm/virt.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git
On Mon, 2015-01-19 at 16:55 +0100, Igor Mammedov wrote:
On Fri, 16 Jan 2015 13:45:06 +0800
Zhu Guihua zhugh.f...@cn.fujitsu.com wrote:
If hot add 100MiB memory like this:
(monitor) object_add memory-backend-ram,id=ram0,size=100M
(monitor) device_add pc-dimm,id=d0,memdev=ram0
The
-Original Message-
From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
Sent: Tuesday, January 20, 2015 1:53 AM
To: Stefano Stabellini
Cc: Xu, Quan; qemu-devel@nongnu.org; xen-de...@lists.xen.org;
lcapitul...@redhat.com; ebl...@redhat.com; arm...@redhat.com;
On 19/01/2015 04:34, Gonglei (Arei) wrote:
At present, vhost-scsi device do not boot in Qemu, but some clients/users have
requirements for that in some scenarios. Of course if we want complete the
aim we should make some changes both Qemu and kernel (vhost-scsi driver
module, it need to add
Previously, qemu block driver of sheepdog used hard-coded VDI object size.
This patch enables users to handle block_size_shift value for
calculating VDI object size.
When you start qemu, you don't need to specify additional command option.
But when you create the VDI which doesn't have default
From: Paolo Bonzini [mailto:pbonz...@redhat.com]
On 19/01/2015 14:10, Pavel Dovgaluk wrote:
Because 'A' is written only inside some of the replay_run_event
callbacks.
It depends on type of the event and it's processing function inside
the QEMU core.
There could be no
On 19/01/2015 22:31, Michael S. Tsirkin wrote:
On Mon, Jan 19, 2015 at 05:56:24PM +0100, Paolo Bonzini wrote:
See v2 for motivation.
v2-v3: dropped pointer passing and patch 4.
Thanks!
Igor - ok with you?
FWIW I'm okay with moving stuff back to the SSDT as part of Igor's other
ACPI
Hi,
Applied, thanks.
You forgot to add your maintainer's signoff to one of Ben's patches.
Since it was a one-liner I didn't think it was worth bouncing the
pullreq for, but you might want to consider adding something to your
pre-pull sanity checks.
checkpatch already does that and is
On Mon, Jan 19, 2015 at 09:23:38PM +0800, arei.gong...@huawei.com wrote:
From: Gonglei arei.gong...@huawei.com
Because vhost-scsi module do not support VHOST_SCSI_GET_TPGT
at present, so I use #if 0 handle it, and set the target
default to 1. In addition, channel and lun both are 0 for
On Mon, Jan 19, 2015 at 01:36:36PM +0100, Paolo Bonzini wrote:
On 19/12/2014 03:02, Igor Mammedov wrote:
keeping bios-linker-loader.c i386 specific would break build
of mips target which is built with CONFIG_ACPI which would
dependend on it in following patch that adds acpi_def_block()
On Mon, Jan 19, 2015 at 01:42:25PM +0100, Paolo Bonzini wrote:
On 19/12/2014 03:02, Igor Mammedov wrote:
Replace template patching and runtime
calculation in _CRS() method with static _CRS
defined in SSDT.
It also drops manual hole patching for reserved
PCI/MEM/CPU hoptlug MMIO
Le 19/01/2015 12:35, Mark Cave-Ayland a écrit :
This patch lays the groundwork for switching sun4u over from ioport NVRAM
access to MMIO NVRAM access.
Patch 1 introduces a new year_offset property which is the offset between the
year value stored in hardware and the actual year. In particular,
Signed-off-by: Hervé Poussineau hpous...@reactos.org
---
hw/timer/m48t59.c | 59 +
include/hw/timer/m48t59.h | 24 ++
2 files changed, 83 insertions(+)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index
-device m48t59_isa can now be used to create a fully functional nvram.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
---
hw/timer/m48t59.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index
Hi,
This patchset QOM'ifies the m48t59 timer.
Patch 1 allows the creation of the m4859 ISA device from the command line.
Patch 2 QOM'ifies the device.
Patches 3 add a Nvram interface to m48txx devices, so that callers can
detect the device and use it without knowing m48txx internals.
Patch 4 is
Remove left-overs from header file.
Move some functions only used by PReP to hw/ppc/prep.c
Signed-off-by: Hervé Poussineau hpous...@reactos.org
---
hw/ppc/ppc.c | 161 -
hw/ppc/prep.c | 161
As m48t59 devices can only be created with m48t59_init() or m48t59_init_isa(),
we know exactly which nvram types are required. Register only those three
types.
Remove .model and .size properties as they can be infered from nvram name.
Rename type to 'isa-*' (and 'sysbus-*') to do like other
On Fri, Dec 19, 2014 at 02:02:37AM +, Igor Mammedov wrote:
keeping bios-linker-loader.c i386 specific would break build
of mips target which is built with CONFIG_ACPI which would
dependend on it in following patch that adds acpi_def_block()
term. Also UEFI for ARM target is going to use
Subject was:
Re: [PATCH v7] block/raw-posix.c: Fixes raw_getlength()
on Mac OS X so that it reports the correct length of a real CD
This patch allows Mac OS X to use a real CDROM disc in QEMU.
Testing this patch will require using QEMU v2.2.0 because the
current git version has a bug in it
Added support for running an AArch32 guest on a AArch64 KVM host. Support has
only been added to the QEMU machvirt machine. The addition of CPU properties
specifiable from the command line were added to allow disablement of AArch64
execution state hereby forcing EL1 to be AArch32. The new CPU
Some registers of Intel IGD are mapped in host bridge, so it needs to
passthrough these registers of physical host bridge to guest because
emulated host bridge in guest doesn't have these mappings.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
Now we retrieve VGA bios like kvm stuff in qemu but we need to
fix Device Identification in case if its not matched with the
real IGD device since Seabios is always trying to compare this
ID to work out VGA BIOS.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
hw/xen/xen_pt.c | 10
qemu_clock_run_timers() only takes care of main_loop_tlg, we shouldn't
forget aio timer list groups.
Currently, the qemu_clock_deadline_ns_all (a few lines above) counts all
the timergroups of this clock type, including aio tlg, but we don't fire
them, so they are never cleared, which makes a
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
From: Michael S. Tsirkin m...@redhat.com
Xen wants to supply a different pci and host devices,
inheriting i440fx devices. Make types configurable.
Description is misleading, this isn't about xen but about IGD
passthrough. Guess kvm needs
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
+DEF(gfx_passthru, 0, QEMU_OPTION_gfx_passthru,
+-gfx_passthru enable Intel IGD passthrough by XEN\n,
+QEMU_ARCH_ALL)
+STEXI
+@item -gfx_passthru
+@findex -gfx_passthru
+Enable Intel IGD passthrough by XEN
+ETEXI
Make that a
On 19/01/2015 13:03, Pavel Dovgaluk wrote:
It will work for protecting the events list (I've already did this).
But that will not work for protecting the log file.
replay_run_event can write some data to the log. And also some other function
like replay_checkpoint
can also write to the log
On 19 January 2015 at 12:49, Greg Kurz gk...@linux.vnet.ibm.com wrote:
Heh, not sure I would have provided such a comprehensive answer. :)
...so now I have a question: what semantics does virtio expect
for its virtio_ld*/st*_phys accessors if QEMU is emulating a
CPU with virtualization support?
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
include/ui/sdl2.h | 2 ++
ui/sdl2-2d.c | 13 +
ui/sdl2.c | 13 +++--
3 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/include/ui/sdl2.h b/include/ui/sdl2.h
index f56c596..51fff2e 100644
---
Just hook up qemu_pixman_check_format.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
ui/spice-display.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/ui/spice-display.c b/ui/spice-display.c
index d2e3793..8c87212 100644
--- a/ui/spice-display.c
+++
From: Benjamin Herrenschmidt b...@kernel.crashing.org
At least all the ones I've tested. We make the assumption that
pixman is going to be better at conversion than we are.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
[ kraxel: just hook up qemu_pixman_check_format ]
From: Gonglei arei.gong...@huawei.com
Signed-off-by: Gonglei arei.gong...@huawei.com
---
hw/scsi/vhost-scsi.c | 9 +
hw/virtio/virtio-pci.c | 2 ++
include/hw/virtio/vhost-scsi.h | 1 +
3 files changed, 12 insertions(+)
diff --git a/hw/scsi/vhost-scsi.c
Rename config option from glx to opengl, glx will not be the only
option for opengl in near future. Also switch over to pkg-config for
opengl support detection.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
configure| 39 +--
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
include/ui/qemu-pixman.h | 16
1 file changed, 16 insertions(+)
diff --git a/include/ui/qemu-pixman.h b/include/ui/qemu-pixman.h
index 381969d..37f9bc2 100644
--- a/include/ui/qemu-pixman.h
+++ b/include/ui/qemu-pixman.h
@@
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
configure| 2 +-
include/ui/console.h | 31 ++
ui/Makefile.objs | 5 +
ui/console-gl.c | 286 +++
4 files changed, 323 insertions(+), 1 deletion(-)
create mode 100644
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
include/ui/sdl2.h | 6 ++
ui/sdl2-2d.c | 6 --
ui/sdl2-input.c | 6 --
ui/sdl2.c | 6 --
4 files changed, 6 insertions(+), 18 deletions(-)
diff --git a/include/ui/sdl2.h b/include/ui/sdl2.h
index f56c596..148308c
On Wed, 07 Jan 2015 08:33:07 +0100
Paolo Bonzini pbonz...@redhat.com wrote:
On 24/12/2014 13:41, Michael S. Tsirkin wrote:
I don't think these are necessary, and I thought these were just RFC
when they were posted. I and mst didn't really understand each other,
and I take the fault
On 2015/1/19 17:13, Paolo Bonzini wrote:
On 19/01/2015 10:04, Gonglei wrote:
Qemu haven't provide a bootindex property for vhost-scsi device.
So, we can not assign the boot order for it at present.
Oh, I see. Sure, I'll be happy to review patches.
Thanks, will post a patch serial
Currently IGD drivers always need to access PCH by 1f.0. But we
don't want to poke that directly to get ID, and although in real
world different GPU should have different PCH. But actually the
different PCH DIDs likely map to different PCH SKUs. We do the
same thing for the GPU. For PCH, the
Pass types to configure pc_init1().
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
hw/i386/pc_piix.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index cc10f72..4148028 100644
--- a/hw/i386/pc_piix.c
+++
basic gfx passthrough support:
- add a vga type for gfx passthrough
- register/unregister legacy VGA I/O ports and MMIOs for passthrough GFX
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
hw/xen/Makefile.objs | 1 +
Just register that pci host bridge specific to passthrough.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
hw/i386/pc_piix.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 4148028..f015238 100644
---
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
Currently IGD drivers always need to access PCH by 1f.0. But we
Obvious question: q35?
q35 already has a isa bridge @ 0x1f.0. Guess that needs to be extended
for the pass-through then (simliar to the host bridge) instead of adding
a dummy
From: Paolo Bonzini [mailto:pbonz...@redhat.com]
On 19/01/2015 13:03, Pavel Dovgaluk wrote:
It will work for protecting the events list (I've already did this).
But that will not work for protecting the log file.
replay_run_event can write some data to the log. And also some other
From: Benjamin Herrenschmidt b...@kernel.crashing.org
This allows VGA to decide whether to use a shared surface based on
whether the UI backend supports the format or not. Backends that
don't provide the new callback fallback to native 32 bpp which
is equivalent to what was supported before.
From: Benjamin Herrenschmidt b...@kernel.crashing.org
At least all the ones I've tested. We make the assumption that
SDL is going to be better at conversion than we are.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
[ kraxel: minor format tweaks ]
Signed-off-by: Gerd Hoffmann
Convinience check_format function for UIs using pixman.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
include/ui/qemu-pixman.h | 2 ++
ui/qemu-pixman.c | 27 +++
2 files changed, 29 insertions(+)
diff --git a/include/ui/qemu-pixman.h
The following changes since commit 1e42c353469cb58ca4f3b450eea4211af7d0b147:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150116'
into staging (2015-01-16 12:06:41 +)
are available in the git repository at:
git://git.kraxel.org/qemu tags/pull-console-20150119-1
for you
From: Paolo Bonzini [mailto:pbonz...@redhat.com]
On 19/01/2015 13:43, Pavel Dovgaluk wrote:
For example, why can't replay_run_event (or something
that it calls) take the replay lock locally, when it writes to the log?
replay_run_event can take the lock. Suppose that it writes data 'A'.
On 19/01/2015 13:57, Artyom Tarasenko wrote:
Is it really ISA if it's MMIO? In other words, why can't this be a
sysbus device?
On physical machines it's EBus, which is pretty much like 8-bit ISA.
So, I think modelling it as ISA is closer to to the reality.
But out of curiosity, would it
From: Paolo Bonzini [mailto:pbonz...@redhat.com]
On 19/01/2015 14:01, Pavel Dovgaluk wrote:
It would be easier if you pointed me to actual code in the series. But
this doesn't seem impossible to fix by atomically writing the 'E' and
'A' in the same critical section.
Because 'A' is
On 19/01/2015 14:10, Pavel Dovgaluk wrote:
Because 'A' is written only inside some of the replay_run_event
callbacks.
It depends on type of the event and it's processing function inside the
QEMU core.
There could be no 'A' at all.
Why can't that code write the 'E' as
On Mon, Jan 19, 2015 at 1:59 PM, Paolo Bonzini pbonz...@redhat.com wrote:
On 19/01/2015 13:57, Artyom Tarasenko wrote:
Is it really ISA if it's MMIO? In other words, why can't this be a
sysbus device?
On physical machines it's EBus, which is pretty much like 8-bit ISA.
So, I think
---
Makefile| 17 +
scripts/shaderinclude.pl| 16
ui/console-gl.c | 28 ++--
ui/shader/texture-blit.frag | 10 ++
ui/shader/texture-blit.vert | 11 +++
5 files changed, 56 insertions(+),
Hi,
Next round of the opengl rendering patches. Rendering code got some
major changes, it using opengl es now. So there is support for
compiling shaders etc now, all the stuff we need when moving away from
the old opengl1 desktop rendering model, toward opengl es (and also
opengl core 3/4).
On Mon, 19 Jan 2015 11:45:39 +
Peter Maydell peter.mayd...@linaro.org wrote:
On 19 January 2015 at 11:35, Stefan Hajnoczi stefa...@gmail.com wrote:
What is the difference between the virtio_tswaps() and
virtio_ld/st_p() families of functions?
virtio_ld/st*_p() perform a load or store
From: Benjamin Herrenschmidt b...@kernel.crashing.org
At least all the ones I've tested. We make the assumption that
pixman is going to be better at conversion than we are.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
[ kraxel: just hook up qemu_pixman_check_format ]
On Mon, Jan 19, 2015 at 1:45 PM, Paolo Bonzini pbonz...@redhat.com wrote:
On 19/01/2015 12:35, Mark Cave-Ayland wrote:
Similar to m48t59_init(), add a mem_base value so that NVRAM can be mapped
via
MMIO rather than ioport if required.
Signed-off-by: Mark Cave-Ayland
On 19/01/2015 13:43, Pavel Dovgaluk wrote:
For example, why can't replay_run_event (or something
that it calls) take the replay lock locally, when it writes to the log?
replay_run_event can take the lock. Suppose that it writes data 'A'.
replay_run_event itself corresponds to some event
On 19/01/2015 13:53, Peter Maydell wrote:
Heh, not sure I would have provided such a comprehensive answer. :)
...so now I have a question: what semantics does virtio expect
for its virtio_ld*/st*_phys accessors if QEMU is emulating a
CPU with virtualization support? Is the assumption just
From: Gonglei arei.gong...@huawei.com
commit 6b1566c (qdev: Introduce FWPathProvider interface) did a
good job for supproting to get firmware path on some different
architectures.
Moreover further more, we can use the interface to get firmware
path name for a device which isn't attached a
Real sun4u systems memory-map the NVRAM on the (ISA) ebus, so switch over to
MMIO from ioport access, adding the 68 year offset used by Sun systems. This
allows all SPARC64 OSs included in my tests to correctly detect the NVRAM IC
and read the hardware clock correctly upon boot.
Note that this
On Fri, Dec 19, 2014 at 11:46:58AM +, Igor Mammedov wrote:
when bridge hotplug is disabled, i.e. for machine
types less then 2.0, bridge device was created as
hotpluggable by mistake since commit 133a2da (2.1).
Fix it by just creating it as a present device as
it was done in 1.7.
On 19/01/2015 12:35, Mark Cave-Ayland wrote:
Similar to m48t59_init(), add a mem_base value so that NVRAM can be mapped via
MMIO rather than ioport if required.
Signed-off-by: Mark Cave-Ayland mark.cave-ayl...@ilande.co.uk
---
Is it really ISA if it's MMIO? In other words, why can't this
This patch follows on from the m48t59 patchset previously posted and switches
sun4u NVRAM access from ioport to MMIO.
Note that this also requires a corresponding OpenBIOS update and so when
submitted as part of a pull request, the openbios-sparc64 binary will also be
updated in order to preserve
On 19/12/2014 03:02, Igor Mammedov wrote:
Replace template patching and runtime
calculation in _CRS() method with static _CRS
defined in SSDT.
It also drops manual hole patching for reserved
PCI/MEM/CPU hoptlug MMIO resources and utilizes
the fact that MMIO resources are reserved by
From: Gonglei arei.gong...@huawei.com
In the way, we can make the bootindex property take effect.
At the meanwhile, the firmware path name of vhost-scsi is
channel@channel/vhost-scsi@target,lun.
Signed-off-by: Gonglei arei.gong...@huawei.com
---
hw/scsi/vhost-scsi.c | 20
From: Gonglei arei.gong...@huawei.com
Qemu haven't provide a bootindex property for vhost-scsi device.
So, we can not assign the boot order for it at present. But
Some clients/users have requirements for that in some scenarios.
This patch achieve the aim in Qemu side.
TODO:
- Post a patch to
On Thu, Jan 15, 2015 at 9:18 PM, Tim Schürmann i...@tim-schuermann.de wrote:
if nothing went wrong the (whole) advent calendar will be on the DVD
published with the Linux Magazin issue 03/2015. The release date is the 05.
Feb. 2015 (in germany).
Cool :)
Stefan
Add new sdl2-gl.c file, with display
rendering functions using opengl.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
include/ui/console.h | 1 +
include/ui/sdl2.h| 11 +
ui/Makefile.objs | 3 ++
ui/sdl.c | 11 +
ui/sdl2-2d.c | 7
ui/sdl2-gl.c
From: Jeremy White jwh...@codeweavers.com
Signed-off-by: Jeremy White jwh...@codeweavers.com
[ kraxel: solve opengl patch conflicts ]
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
configure| 24 +++-
hw/display/Makefile.objs | 1 +
2 files changed, 20
From: Benjamin Herrenschmidt b...@kernel.crashing.org
In order to remove the logic for detecting supported shared
pixmap formats from device models, make qemu_default_pixman_format()
capable for failing by returning 0 which is not a possible format
value rather than asserting.
Signed-off-by:
On 19/01/2015 14:01, Pavel Dovgaluk wrote:
It would be easier if you pointed me to actual code in the series. But
this doesn't seem impossible to fix by atomically writing the 'E' and
'A' in the same critical section.
Because 'A' is written only inside some of the replay_run_event
On Mon, Jan 19, 2015 at 12:49 PM, Greg Kurz gk...@linux.vnet.ibm.com wrote:
On Mon, 19 Jan 2015 11:45:39 +
Peter Maydell peter.mayd...@linaro.org wrote:
On 19 January 2015 at 11:35, Stefan Hajnoczi stefa...@gmail.com wrote:
What is the difference between the virtio_tswaps() and
On Thu, 01/15 13:47, Max Reitz wrote:
On 2015-01-03 at 07:23, Jun Li wrote:
On Fri, 11/21 11:56, Max Reitz wrote:
So, as for what I think we do need to do when shrinking (and keep in mind:
The offset given to qcow2_truncate() is the guest size! NOT the host image
size!):
(1) Determine the
On 16 January 2015 at 18:36, Peter Maydell peter.mayd...@linaro.org wrote:
On 21 October 2014 at 17:55, Greg Bellows greg.bell...@linaro.org wrote:
-#define NB_MMU_MODES 2
+#define NB_MMU_MODES 4
So this turns out not to quite be what we want.
A QEMU MMU mode index basically defines a (vaddr
From: Gonglei arei.gong...@huawei.com
Because vhost-scsi module do not support VHOST_SCSI_GET_TPGT
at present, so I use #if 0 handle it, and set the target
default to 1. In addition, channel and lun both are 0 for
bootable vhost-scsi device.
Signed-off-by: Gonglei arei.gong...@huawei.com
On Mon, Jan 19, 2015 at 12:57:18PM +0100, Gerd Hoffmann wrote:
On Mo, 2015-01-19 at 17:28 +0800, Tiejun Chen wrote:
Currently IGD drivers always need to access PCH by 1f.0. But we
Obvious question: q35?
q35 already has a isa bridge @ 0x1f.0. Guess that needs to be extended
for the
On Mon, Jan 19, 2015 at 12:24:03PM +0100, Paolo Bonzini wrote:
Due to a typo, instead of disabling KVM_FEATURE_PV_EOI (bit
6) these machine types are disabling bits 1 and 2, which are
KVM_FEATURE_NOP_IO_DELAY and KVM_FEATURE_MMU_OP. Not a big deal
because they aren't very important and
Convert the device models where initialization obviously can't fail.
Signed-off-by: Markus Armbruster arm...@redhat.com
---
hw/acpi/piix4.c| 5 ++---
hw/audio/ac97.c| 5 ++---
hw/audio/es1370.c | 5 ++---
hw/audio/intel-hda.c | 6 ++
I posted this series as RFC back in October, but it depended on
patches then still under review, so I put it aside, and promptly
forgot. Fortunately, rebasing and updating it wasn't much trouble.
While discussing Gonglei's [PATCH v2 00/19] usb: convert device init
to realize, Paolo called the
Am 19.01.2015 um 13:57 schrieb Artyom Tarasenko:
On Mon, Jan 19, 2015 at 1:45 PM, Paolo Bonzini pbonz...@redhat.com wrote:
On 19/01/2015 12:35, Mark Cave-Ayland wrote:
Similar to m48t59_init(), add a mem_base value so that NVRAM can be mapped
via
MMIO rather than ioport if required.
1 - 100 of 312 matches
Mail list logo
