Ping.
Can I get any suggestions on this patch.
Best regards,
Pankaj
>
> vhostforce was added to enable vhost when
> guest don't have MSI-X support.
> Now, we have scenarios like DPDK in Guest which dont use
> interrupts and still use vhost. Also, performance of guests
> without MSI-X suppo
On 2015/5/27 0:00, Igor Mammedov wrote:
> On Mon, 25 May 2015 10:55:05 +0800
> Shannon Zhao wrote:
>
>> From: Shannon Zhao
>>
>> MADT describes GIC enabled ARM platforms. The GICC and GICD
>> subtables are used to define the GIC regions.
>>
>> Signed-off-by: Shannon Zhao
>> Signed-off-by: Sha
On 05/11/2015 12:58 AM, Justin Ossevoort wrote:
> The current guest-fstrim support only returns an error if some
> mountpoint was unable to be trimmed, skipping any possible additional
> mountpoints. The result of the TRIM operation itself is also discarded.
>
> This change returns a per mountpoin
Quoting Justin Ossevoort (2015-05-11 01:58:45)
> The current guest-fstrim support only returns an error if some
> mountpoint was unable to be trimmed, skipping any possible additional
> mountpoints. The result of the TRIM operation itself is also discarded.
>
> This change returns a per mountpoint
On Tue, May 26, 2015 at 10:58:02AM +0200, Paolo Bonzini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA256
>
>
>
> On 26/05/2015 04:46, David Gibson wrote:
> > On Tue, May 26, 2015 at 01:05:56AM +1000, Alexey Kardashevskiy
> > wrote:
> >> Hi Paolo,
> >>
> >> I have had a conversation w
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal the eventfd registered by this
vfio device, the results in the qemu eventfd handler getting
invoked.
this patch is to pass the error to guest and have the guest driver
recover from the error.
Signed-of
Hi,
Because having no body comment it.
and I have made some updates on this patches.
which are:
1. add check the case when one aer devices is re-hotplugged
to upper bus which will conflict the present which enable aer.
2. add vfio_pci_affect_devices_is_multi to specify signal or
add 'aer' property to let user able to decide whether expose
the aer capability. by default we should disable aer feature,
because it needs configuration restrictions.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
in
For vfio device, we need to propagate the aer error to
Guest OS. we use the pcie_aer_msg() to send aer error
to guest.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
include/hw/pci/pcie_aer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pcie_aer.c b/
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 91ad9ad..a8c5988 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -156,6 +156,7 @@ typedef struct VFIOPCIDevice {
PCIHostDeviceAddress host;
Particularly, For vfio devices, Once need to recovery devices
by bus reset such as AER, we always need to reset the host bus
to recovery the devices under the bus, so we need to add pci bus
callbacks to specify to do host bus reset.
Signed-off-by: Chen Fan
---
hw/pci/pci.c | 16 +
when do virtual secondary bus reset, the vfio device under
this bus need to do host bus reset to reset the device.
so add this case.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 75 +++
1 file changed, 75 insertions(+)
diff --git a/hw/vfio/
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 32
1 file changed, 32 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 5934fd7..91ad9ad 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3801,6 +3801,33 @@ out:
g_free(info);
}
+static void vfio
we introduce a has_bus_reset capability to sign the vfio
devices if support host bus reset.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 123 ++
1 file changed, 123 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index f4e7855..593
Calling pcie_aer_init to initilize aer related registers for
vfio device, then reload physical related registers to expose
device capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 83 ++-
1 file changed, 82 insertions(+), 1 deletion(-
pcie_aer_init was used to emulate an aer capability for pcie device,
but for vfio device, the aer config space size is mutable and is not
always equal to PCI_ERR_SIZEOF(0x48). it depends on where the TLP Prefix
register required, so here we add a size argument.
Signed-off-by: Chen Fan
---
hw/pci
the function is used to get affected devices by bus reset.
so here extract it, and can used for aer soon.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 67 +++
1 file changed, 49 insertions(+), 18 deletions(-)
diff --git a/hw/vfio/pci.c b/hw
For vfio pcie device, we could expose the extended capability on
PCIE bus. in order to avoid config space broken, we introduce
a copy config for parsing extended caps. and rebuild the pcie
extended config space.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 73 +
For now, for vfio pci passthough devices when qemu receives
an error from host aer report, there just terminate the guest,
but usually user want to know what error occurred but stop the
guest, so this patches add aer capability support for vfio device,
and pass the error to guest, and have guest dr
On 05/26/2015 07:05 PM, Eric Blake wrote:
On 05/26/2015 03:33 PM, Stefan Berger wrote:
Rather than integrating TPM functionality into QEMU directly
using the TPM emulation of libtpms, we now integrate an external
emulated TPM device. This device is expected to implement a Linux
CUSE interface (C
Quoting Olga Krishtal (2015-05-25 05:41:22)
> On 11/05/15 09:58, Justin Ossevoort wrote:
>
> The current guest-fstrim support only returns an error if some
> mountpoint was unable to be trimmed, skipping any possible additional
> mountpoints. The result of the TRIM operation itself is
On 05/25/2015 10:11 AM, Andrew Jones wrote:
> On Fri, May 22, 2015 at 06:08:30PM -0700, Mario Smarduch wrote:
>> On 05/18/2015 08:53 AM, Catalin Marinas wrote:
>>> On Thu, May 14, 2015 at 02:46:44PM +0100, Andrew Jones wrote:
On Thu, May 14, 2015 at 01:05:09PM +0200, Christoffer Dall wrote:
>>
Quoting Justin Ossevoort (2015-05-11 01:58:44)
> The FITRIM ioctl updates the fstrim_range structure it receives. This
> way the caller can determine how many bytes were trimmed. The
> guest-fstrim logic reuses the same fstrim_range for each filesystem,
> effectively limiting each filesystem to tri
Signed-off-by: Paulo Alcantara
---
tests/Makefile | 2 +
tests/tco-test.c | 347 +++
2 files changed, 349 insertions(+)
create mode 100644 tests/tco-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 729b969..43950d0 100644
--- a/te
This interface provides some registers within a 32-byte range and can be
acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
It's commonly used as a watchdog timer to detect system lockups through
SMIs that are generated -- if TCO_EN bit is set -- on every timeout. If
NO_REBOOT bit is not
Signed-off-by: Paulo Alcantara
---
hw/i386/acpi-dsdt-pdrc.dsl| 46 ++
hw/i386/q35-acpi-dsdt.dsl | 1 +
tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7795 bytes
3 files changed, 47 insertions(+)
create mode 100644 hw/i386/acpi-dsdt-pdrc.dsl
diff
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Signed-off-by: Paulo Alcantara
---
src/fw/dev-q35.h | 3 +++
src/fw/pciinit.c | 4
2 files changed, 7 insertions(+)
diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
index c6f
[This Week]
- Patch: Combined Adler-32 and copyright
- Remove extraneous "interrupts" property from /pci/mac-io
- I'm having trouble tracking down where the property is actually being
set. The mac-io devices are defined in drivers/pci_database.c, but the
pci_dev_t struct (driver
On 05/27/2015 01:51 AM, Paolo Bonzini wrote:
On 26/05/2015 17:49, Alexey Kardashevskiy wrote:
It's very little used, but that's just because it's not too common.
There's nothing wrong with it. :)
If you do del/set_size/add, you may want to put a
memory_region_transaction_{begin,commit} aroun
When a command fails due to incorrect syntax or input,
suggest using the "help" command to get more information
about the command. This is only applicable for HMP.
Before:
(qemu) drive_add usb_flash_drive
drive_add: string expected
After:
(qemu) drive_add usb_flash_drive
drive_add: string expected
v2:
Split up the command name and arguments parsing into
separate functions. [1/2]
Skip checking for failures with commands that use the .cmd_new
interface or the async interface since they are scheduled
for removal [2/2]
Bandan Das (2):
monitor: cleanup parsing of cmd name and cmd arguments
m
There's too much going on in monitor_parse_command().
Split up the arguments parsing bits into a separate function
monitor_parse_arguments(). Let the original function check for
command validity and sub-commands if any and return data (*cmd)
that the newly introduced function can process and return
On 05/26/2015 03:33 PM, Stefan Berger wrote:
> Rather than integrating TPM functionality into QEMU directly
> using the TPM emulation of libtpms, we now integrate an external
> emulated TPM device. This device is expected to implement a Linux
> CUSE interface (CUSE = character device in userspace).
On 2015-05-25 14:21, Paul Burton wrote:
> Commit 94c2b6aff43c (mips_malta: support up to 2GiB RAM) provided
> support for using over 256MB of RAM with the MIPS Malta board, including
> capping the memsize variable that QEMUs pseudo-bootloader provides to
> the kernel at 256MB in order to match YAMO
On 2015-05-26 18:54, Paolo Bonzini wrote:
> QEMU is currently accessing the dirty bitmaps very liberally,
> which is understandable since the accesses are cheap. This is
> however not good for squeezing maximum performance out of dataplane,
> and is also not good if the accesses become more expens
On 2015-05-26 18:55, Paolo Bonzini wrote:
> From: Stefan Hajnoczi
>
> The cpu_physical_memory_reset_dirty() function is sometimes used
> together with cpu_physical_memory_get_dirty(). This is not atomic since
> two separate accesses to the dirty memory bitmap are made.
>
> Turn cpu_physical_mem
On 2015-05-26 23:43, Alexander Graf wrote:
>
>
> On 26.05.15 18:15, Richard Henderson wrote:
> > On 05/26/2015 02:09 AM, Aurelien Jarno wrote:
> >> This is an important detail in case the base register is in the list
> >> of registers to be loaded. If a page fault occurs this register might be
>
On 2015-05-26 09:00, Richard Henderson wrote:
> On 05/25/2015 11:03 PM, Aurelien Jarno wrote:
> > On 2015-05-25 16:08, Richard Henderson wrote:
> >> On 05/24/2015 04:47 PM, Aurelien Jarno wrote:
> >>> Cc: Alexander Graf
> >>> Cc: Richard Henderson
> >>> Signed-off-by: Aurelien Jarno
> >>
> >> Sa
On Mon, May 11, 2015 at 11:10:05 +0200, alvise rigo wrote:
> the last commit was b8df9208f357d2b36e1b19634aea973618dc7ba8.
Thanks.
Unfortunately a segfault still happens very early:
$ gdb arm-softmmu/qemu-system-arm
GNU gdb (Ubuntu/Linaro 7.4-2012.04-0ubuntu2.1) 7.4-2012.04
Copyright (C) 2012 Fr
On 26.05.15 18:15, Richard Henderson wrote:
> On 05/26/2015 02:09 AM, Aurelien Jarno wrote:
>> This is an important detail in case the base register is in the list
>> of registers to be loaded. If a page fault occurs this register might be
>> overwritten and when the instruction is later restarte
On 5/12/15 05:26, Chen Gang wrote:
>>> >> +}
>>> >> +
>>> >> +/*
>>> >> + * Functional Description
>>> >> + *
>>> >> + *uint64_t output = 0;
>>> >> + *uint32_t counter;
>>> >> + *for (counter = 0; counter < (WORD_SIZE / 32); counter++)
>>> >> + *{
>>> >> + *
Rather than integrating TPM functionality into QEMU directly
using the TPM emulation of libtpms, we now integrate an external
emulated TPM device. This device is expected to implement a Linux
CUSE interface (CUSE = character device in userspace).
QEMU talks to the CUSE TPM using much functionality
For automated management of a TPM device, implement the TCG Physical Presence
Interface Specification that allows a root user on Linux (for example) to set
an opcode for a sequence of TPM operations that the BIOS is supposed to execute
upon reboot of the physical or virtual machine. A sequence of o
Introduce a lock and a condition to notify anyone waiting for the completion
of the execution of a TPM command by the backend (thread). The backend
uses the condition to signal anyone waiting for command completion.
We need to place the condition in two locations: one is invoked by the
backend thre
Introduce RAM locations in the vendor specific area in the TIS. These
locations will survive a reset and will be part of the state written
during a suspend. Their puspose is to support the physical presence
interface where the OS (ACPI) and the firmware (SeaBIOS) use these RAM
locations to exchange
TPM backends will suspend independently of the frontends. Also
here we need to be able to wait for the TPM command to have been
completely processed.
Signed-off-by: Stefan Berger
---
hw/tpm/tpm_passthrough.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/tpm/tpm_pas
Extend the TPM TIS code to support suspend/resume. In case a command
is being processed by the external TPM when suspending, wait for the command
to complete to catch the result. In case the bottom half did not run,
run the one function the bottom half is supposed to run. This then
makes the resume
The following series of patches extends TPM support with an
external TPM that offers a Linux CUSE (character device in userspace)
interface. This TPM lets each VM access its own private vTPM.
The CUSE TPM supports suspend/resume and migration. Much
out-of-band functionality necessary to control the
On 05/25/2015 08:53 AM, Paolo Bonzini wrote:
>
> On 22/05/2015 13:12, Daniel P. Berrange wrote:
>> In
>> particular I don't see why we need to have a SATA controller and ISA/LPC
>> bridge in every virt machine - root PCI bus only should be possible, as you
>> can provide disks via virtio-blk or vi
26.05.2015 20:04, Michael Tokarev wrpte:
> 26.05.2015 19:49, Laszlo Ersek wrote:
[]
>> the right (updated) iPXE binaries. (I think Gerd's patches implementing
>> the update have not been merged into upstream qemu yet? The most recent
>> patch from Gerd, under pc-bios/, is
>> c246cee4eedb17ae3932d69
Hello,
> I've tested an unpatched QEMU 2.3.0 (x86_64) with "-k pt_br" option and
> the
> "/?°" key works perfectly.
>From the manpage of qemu:
-k language
Use keyboard layout language (for example "fr" for French). This option
is only needed where it is not easy to get raw PC keycodes (e.g.
Hello,
>> 12:44:02.389552: EV_MSC MSC_SCAN 458887 <== Here, / was pressed
>> 12:44:02.389552: EV_KEY KEY_RO (0x59) pressed
>
> 'RO'. Hmm, not very descriptive. Any idea what this could stand for?
RO stands for Romaji, which is japanese with roman letters (transliteration).
>
>> 12:44:04.253486
Add a TPM2 ACPI table if a TPM 2 is used in the backend.
Also add an SSDT for the TPM 2.
Rename tpm_find() to tpm_get_version() and have this function
return the version of the TPM found, TPMVersion_Unspec if
no TPM is found. Use the version number to build version
specific ACPI tables.
Signed-of
In the TPM passthrough backend driver, modify the probing code so
that we can check whether a TPM 1.2 or TPM 2 is being used
and adapt the behavior of the TPM TIS accordingly.
Move the code that tested for a TPM 1.2 into tpm_utils.c
and extend it with test for probing for TPM 2. Have the
function
After the previous upgrade of the TPM TIS to version 1.3,
we now upgrade it to support a TPM 2 in the backend.
Stefan Berger (3):
Extend TPM TIS interface to support TPM 2
tpm: Probe for connected TPM 1.2 or TPM 2
TPM2 ACPI table support
backends/tpm.c | 14 +
hw/i386
Following the recent upgrade to version 1.3, extend the TPM TIS
interface with capabilities introduced for support of a TPM 2.
TPM TIS for TPM 2 introduced the following extensions beyond the
TPM TIS 1.3 (used for TPM 1.2):
- A new 32bit interface Id register was introduced.
- New flags for the s
On Tue, 26 May 2015, Michael Tokarev wrote:
FWIW, 0xC means RETURN_NO_MEDIA. Which is kind of strange.
But it is the first load which is done by syslinux.efi, not
by ipxe rom.
I vaguely remember it happens when syslinux.efi thinks it is reading a
disk and not booting from the network so it's
26.05.2015 23:17, BALATON Zoltan wrote:
> On Tue, 26 May 2015, Laszlo Ersek wrote:
>> On 05/26/15 19:04, Michael Tokarev wrote:
>>> No, I mean I see the same error message "Failed to read blocks: 0xC"
>>> after syslinux.efi load. The banner is new, with a few changed details.
>>
>> Interesting --
On Tue, 26 May 2015, Laszlo Ersek wrote:
On 05/26/15 19:04, Michael Tokarev wrote:
No, I mean I see the same error message "Failed to read blocks: 0xC"
after syslinux.efi load. The banner is new, with a few changed details.
Interesting -- no clue where "Failed to read blocks" comes from. Not
On 05/26/2015 01:10 PM, Alberto Garcia wrote:
> On Tue 26 May 2015 08:52:41 PM CEST, Eric Blake wrote:
>
>>> +# @cache-clean-interval: #optional clean unused entries in the L2 and
>>> refcount
>>> +# caches. The interval is in seconds (since 2.4)
>>> +#
>>> # Since: 1.7
On Tue 26 May 2015 08:52:41 PM CEST, Eric Blake wrote:
>> +# @cache-clean-interval: #optional clean unused entries in the L2 and
>> refcount
>> +# caches. The interval is in seconds (since 2.4)
>> +#
>> # Since: 1.7
>
> Is there any QMP command that can query the curren
On Mon, 11 May 2015 08:58:44 +0200
Justin Ossevoort wrote:
> The FITRIM ioctl updates the fstrim_range structure it receives. This
> way the caller can determine how many bytes were trimmed. The
> guest-fstrim logic reuses the same fstrim_range for each filesystem,
> effectively limiting each fil
On 05/26/2015 11:14 AM, Alberto Garcia wrote:
> This adds a new 'cache-clean-interval' option that cleans all qcow2
> cache entries that haven't been used in a certain interval, given in
> seconds.
>
> This allows setting a large L2 cache size so it can handle scenarios
> with lots of I/O and at t
The previous code for handling payload length when converting
cmsg structures from host to target had a number of problems:
* we required the msg->msg_controllen to declare the buffer
to have enough space for final trailing padding (we were
checking against CMSG_SPACE), whereas the kernel do
The target payloads in cmsg conversions may not have the alignment
required by the host. Using the get_user and put_user functions is
the easiest way to handle this and also do the byte-swapping we
require.
(Note that prior to this commit target_to_host_cmsg was incorrectly
using __put_user() rath
This patchset fixes some problems in conversions of cmsg structures
in target_to_host_cmsg() (used in send/recvmsg handling). Specifically:
* we required the msg->msg_controllen to declare the buffer
to have enough space for final trailing padding (we were
checking against CMSG_
On 05/26/15 19:04, Michael Tokarev wrote:
> 26.05.2015 19:49, Laszlo Ersek wrote:
> []
>>> However, after the update of efi roms in qemu, the original problem
>>> of booting syslinux in OVMF still persists. I received several
>>> private messages asking whenever I succeeded in resolving the
>>> or
On 26/05/2015 15:07, Thomas Huth wrote:
> Certainly no objections from my side to keep this "vlan" concept in
> QEMU, but thinking about this option again, I'd rather call it "hub=xx"
> for the -netdev option instead of "vlan=xx", since this better matches
> the "-netdev hubport" naming and it IM
On Tue, 26 May 2015 17:43:09 +0100
Stefan Hajnoczi wrote:
> On Tue, May 26, 2015 at 3:36 PM, Daniel P. Berrange
> wrote:
> > On Tue, May 26, 2015 at 04:29:51PM +0200, Markus Armbruster wrote:
> >> Stefan Hajnoczi writes:
> >>
> >> > On Fri, May 22, 2015 at 09:22:19PM +0200, Thomas Huth wrote:
ping ?
On Mon, May 18, 2015 at 08:47:24AM -0400, Gabriel L. Somlo wrote:
> It has been reported that sometimes the .rodata section of SeaBIOS,
> containing the constant string against which the SMBIOS signature
> ends up being compared, also falls within the guest f-segment. In
> that case, the te
On 26 May 2015 at 18:13, aurelio remonda wrote:
> There are 85 instructions labeled as DSP (all of them thumb2), im just
> testing on disas_thumb2_insn if the feature is enabled before the
> instruction is generated.i.e.
> if (!arm_dc_feature(s, ARM_FEATURE_DSP)) goto illegal_op;
> Im using DDI043
On 05/26/2015 09:53 AM, Peter Maydell wrote:
> On 26 May 2015 at 17:49, Yongbok Kim wrote:
>> Add probe_write() forces a tlb_fill if the specified guest virtual
>> index isn't in the TCG softmmu TLB.
>
> Surely the point is not to fill the TLB but to raise an
> exception if the address is not wri
On Tue, May 26, 2015 at 10:18 AM, Paolo Bonzini wrote:
>
>
> On 26/05/2015 19:05, Peter Crosthwaite wrote:
>> OK, but it is an odd one out, would you be willing to accept
>> the double include that seems to be widespread?
>>
>> +#include "qemu_common.h"
>> #include "cpu.h"
>> -#include "exec/cpu-
On 26.05.2015 19:14, Alberto Garcia wrote:
This adds a new 'cache-clean-interval' option that cleans all qcow2
cache entries that haven't been used in a certain interval, given in
seconds.
This allows setting a large L2 cache size so it can handle scenarios
with lots of I/O and at the same time
On Tue, May 26, 2015 at 02:18:32PM -0300, Eduardo Habkost wrote:
> (Fixing subject line)
>
> On Tue, May 26, 2015 at 06:35:45AM +0200, Jan Kiszka wrote:
> > From: Jan Kiszka
> >
> > ARAT signals that the APIC timer does not stop in power saving states.
> > As our APICs are emulated, it's fine to
On 26/05/2015 19:15, Peter Crosthwaite wrote:
> On Tue, May 26, 2015 at 6:29 AM, Paolo Bonzini wrote:
>>
>>
>> On 26/05/2015 07:38, Peter Crosthwaite wrote:
>>> make can be invoked in the individual build dirs to build an individual
>>> target or just a single file of a target. e.g.
>>>
>>> touc
On Tue, May 26, 2015 at 6:29 AM, Paolo Bonzini wrote:
>
>
> On 26/05/2015 07:38, Peter Crosthwaite wrote:
>> make can be invoked in the individual build dirs to build an individual
>> target or just a single file of a target. e.g.
>>
>> touch translate-all.c
>> make -C microblazeel-softmmu transla
On Tue, May 26, 2015 at 9:58 AM, Andreas Färber wrote:
> Am 26.05.2015 um 18:49 schrieb Yongbok Kim:
>> Add probe_write() forces a tlb_fill if the specified guest virtual
>> index isn't in the TCG softmmu TLB.
>>
>> Signed-off-by: Yongbok Kim
>> ---
>> include/exec/exec-all.h |2 ++
>> softm
On 26/05/2015 19:05, Peter Crosthwaite wrote:
> OK, but it is an odd one out, would you be willing to accept
> the double include that seems to be widespread?
>
> +#include "qemu_common.h"
> #include "cpu.h"
> -#include "exec/cpu-all.h"
This is exactly what I meant. What is odd about it?
In
(Fixing subject line)
On Tue, May 26, 2015 at 06:35:45AM +0200, Jan Kiszka wrote:
> From: Jan Kiszka
>
> ARAT signals that the APIC timer does not stop in power saving states.
> As our APICs are emulated, it's fine to expose this feature to guests,
> at least when asking for KVM host features or
On 26/05/2015 18:58, Andreas Färber wrote:
>> > +#if DATA_SIZE == 1
>> > +/*
>> > + * Force a tlb_fill if the specified guest virtual index isn't in the TCG
>> > + * softmmu TLB.
>> > + */
>> > +void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
>> > + uintptr_t r
New version of the series.
v2:
- Clarify that the block-commit mentioned in the first patch refers to
the HMP commit command.
- Check the value of cache_clean_interval and cast it accordingly to
prevent it from overflowing.
v1: https://lists.gnu.org/archive/html/qemu-devel/2015-05/msg03510.ht
After having emptied the cache, the data in the cache tables is no
longer useful, so we can tell the kernel that we are done with it. In
Linux this frees the resources associated with it.
The effect of this can be seen in the HMP commit operation: it moves
data from the top to the base image (and
This adds a new 'cache-clean-interval' option that cleans all qcow2
cache entries that haven't been used in a certain interval, given in
seconds.
This allows setting a large L2 cache size so it can handle scenarios
with lots of I/O and at the same time use little memory during periods
of inactivit
There are 85 instructions labeled as DSP (all of them thumb2), im just
testing on disas_thumb2_insn if the feature is enabled before the
instruction is generated.i.e.
if (!arm_dc_feature(s, ARM_FEATURE_DSP)) goto illegal_op;
Im using DDI0439B_cortex_m4_r0p0_trm - Cortex-M4 Technical Reference Manua
Changing the current ordering saves 8 bytes per cache entry in x86_64.
Signed-off-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2-cache.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/qcow2-cache.c b/block/qcow2-cache.c
index a215f5b..43590ff 100644
--- a/b
26.05.2015 19:49, Laszlo Ersek wrote:
[]
>> However, after the update of efi roms in qemu, the original problem
>> of booting syslinux in OVMF still persists. I received several
>> private messages asking whenever I succeeded in resolving the
>> original prob outlined at
>>
>> http://www.syslinux
On Tue, May 26, 2015 at 1:12 AM, Paolo Bonzini wrote:
>
>
> On 26/05/2015 08:38, Peter Crosthwaite wrote:
>> Rather than an explicit inclusion of cpu.h. This maked it more
>> consistent with other core code files, which either just rely on
>> qemu-common.h inclusion or preceed cpu.h with qemu-comm
On Tue, May 26, 2015 at 01:54:06PM +0100, Ikey Doherty wrote:
> The target-x86_64.conf sysconfig file has been empty and essentially ignored
> now for several years. This change removes the unused file to enable moving
> towards a stateless configuration.
>
> Signed-off-by: Ikey Doherty
Reviewed
Am 26.05.2015 um 18:49 schrieb Yongbok Kim:
> Add probe_write() forces a tlb_fill if the specified guest virtual
> index isn't in the TCG softmmu TLB.
>
> Signed-off-by: Yongbok Kim
> ---
> include/exec/exec-all.h |2 ++
> softmmu_template.h | 20
> 2 files change
From: Stefan Hajnoczi
The dirty memory bitmap is managed by ram_addr.h and copied to
migration_bitmap[] periodically during live migration.
Move the code to sync the bitmap to ram_addr.h where related code lives.
Signed-off-by: Stefan Hajnoczi
Message-Id: <1417519399-3166-5-git-send-email-stef
One recent example is commit 4cc856f (kvm-all: Sync dirty-bitmap from
kvm before kvm destroy the corresponding dirty_bitmap, 2015-04-02).
Another performance problem is that KVM keeps tracking dirty pages
after a failed live migration, which causes bad performance due to
disallowing huge page mappi
These days modification of the TLB is done in notdirty_mem_write,
so the virtual address and env pointer as unnecessary.
The new name of the function, tlb_unprotect_code, is consistent with
tlb_protect_code.
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
---
cputlb.c | 3 +--
On Tue, May 26, 2015 at 05:41:08PM +0100, Ikey Doherty wrote:
> On 26/05/15 17:38, Eduardo Habkost wrote:
> >On Tue, May 26, 2015 at 01:54:07PM +0100, Ikey Doherty wrote:
> >>The goal of stateless, and thus this change, is to separate OS configuration
> >>from system administrator configuration. Wi
From: Stefan Hajnoczi
Use set_bit_atomic() and bitmap_set_atomic() so that multiple threads
can dirty memory without race conditions.
Signed-off-by: Stefan Hajnoczi
Message-Id: <1417519399-3166-4-git-send-email-stefa...@redhat.com>
Reviewed-by: Fam Zheng
Signed-off-by: Paolo Bonzini
---
incl
When the dirty log mask will also cover other bits than DIRTY_MEMORY_VGA,
some listeners may be interested in the overall zero/non-zero value of
the dirty log mask; others may be interested in the value of single bits.
For this reason, always call log_start/log_stop if bits have respectively
appea
From: Stefan Hajnoczi
The fast path of cpu_physical_memory_sync_dirty_bitmap() directly
manipulates the dirty bitmap. Use atomic_xchg() to make the
test-and-clear atomic.
Signed-off-by: Stefan Hajnoczi
Message-Id: <1417519399-3166-7-git-send-email-stefa...@redhat.com>
[Only do xchg on nonzero
Most of the time, not all bitmaps have to be marked as dirty;
do not do anything if the interesting ones are already dirty.
Previously, any clean bitmap would have cause all the bitmaps to be
marked dirty.
In fact, unless running TCG most of the time bitmap operations need
not be done at all, beca
The memory API can now return the exact set of bitmaps that have to
be tracked. Use it instead of the in_migration variable.
In the next patches, we will also use it to set only DIRTY_MEMORY_VGA
or DIRTY_MEMORY_MIGRATION if necessary. This can make a difference
for dataplane, especially after th
From: Stefan Hajnoczi
The cpu_physical_memory_reset_dirty() function is sometimes used
together with cpu_physical_memory_get_dirty(). This is not atomic since
two separate accesses to the dirty memory bitmap are made.
Turn cpu_physical_memory_reset_dirty() and
cpu_physical_memory_clear_dirty_ra
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