Hi Fred,
Thanks for the patch.
> -Original Message-
> From: fred.kon...@greensocs.com [mailto:fred.kon...@greensocs.com]
> Sent: Monday, July 06, 2015 9:22 AM
> To: qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; Peter Crosthwaite; Hyun Kwon;
> guillaume.delber...@greensocs.com; mar
Hi Fred,
Thanks for the patch.
> -Original Message-
> From: fred.kon...@greensocs.com [mailto:fred.kon...@greensocs.com]
> Sent: Monday, July 06, 2015 9:22 AM
> To: qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; Peter Crosthwaite; Hyun Kwon;
> guillaume.delber...@greensocs.com; mar
Hi Fred,
Thanks for the patch.
> -Original Message-
> From: fred.kon...@greensocs.com [mailto:fred.kon...@greensocs.com]
> Sent: Monday, July 06, 2015 9:22 AM
> To: qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; Peter Crosthwaite; Hyun Kwon;
> guillaume.delber...@greensocs.com; mar
2015-07-09 9:29 GMT-07:00 Christopher Covington :
> On 06/30/2015 09:57 PM, Serge Vakulenko wrote:
>>
>> $ /usr/local/qemu-mips/bin/qemu-system-mipsel -M pic32mx7-max32
>> -nographic -monitor none -serial stdio -bios boot-max32.hex -kernel
>> unix.hex -sd sdcard.img
>> Board: chipKIT Max32
>> Proce
ATAPI transfers using the AHCI HBA will work if you ask the HBA to perform
a DMA transfer, but if you ask for PIO, it will not.
All AHCI transfers are actually DMA anyway, but the AHCI HBA will need some
assistance from the core layer to help it manage its covert-ops DMA when
performing PIO routin
We're supposed to abort on transfers like this, unless we fill
Word 125 of our IDENTIFY data with a default transfer size, which
we don't currently do.
This is an ATA error, not a SCSI/ATAPI one.
See ATA8-ACS3 sections 7.17.6.49 or 7.21.5.
If we don't do this, QEMU will loop forever trying to tra
This variable was originally added to keep track of offsets in AHCI
rather exclusively, but it was added to IDEState. AHCI fakes all PIO
transfers using DMA and a scatter-gather list. When the core or atapi
layers invoke HBA-specific mechanisms for transfers, they do not always
know that it is bein
This is using a ds1338 RTC chip on the I2C bus. This RTC chip is
not present on the real 3DS PDK board.
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* use a common header file for I2C regs definition
Changes since v3:
* rewo
For now we support the following devices:
* CPU: ARM926
* Interrupt Controller: AVIC
* CCM
* UART x 5
* EPIT x 2
* GPT x 4
* FEC
* I2C x 3
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
Tested by booting a minimal Linux system on the emulated platform
Tested by booting the Xvisor hyprvisor on the emulated platform
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* Added a ds1338 I2C device for qtest purpose.
Changes since v2:
* none
Changes since v3:
*
For now we support the following devices:
* CPU: ARM1136
* Interrupt Controller: AVIC
* CCM
* UART x 2
* EPIT x 2
* GPT
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
The slave mode is not implemented.
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* none
Changes since v2:
* use QOM cast
* reworked debug printf
* use CamelCase for state type
* warn with qemu_log_mask(LOG_GUEST_ERROR) or qem
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6:
* not
Tested by booting a minimal Linux system on the emulated platform
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6:
* not pres
This is based on mcf_fec.c FEC implementation for Coldfire
* A generic PHY was added (borrowwed from LAN9118)
* The buffer management is also modified as buffers are
slightly different between Coldfire and i.MX
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Ch
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6:
* not present
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6:
* not present
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6:
* not present
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
C
Signed-off-by: Jean-Christophe Dubois
Reviewed-by: Peter Crosthwaite
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v3:
* not present on v3
Changes since v4:
* not present on v4
Changes since v5:
* not present on v5
Changes since v6
Move constructor to DeviceClass methods
* imx_serial_init
* imx_serial_realize
imx32_serial_properties is renamed to imx_serial_properties.
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* not present on v1
Changes since v2:
* not present on v2
Changes since v
This series of patches add the support for the i.MX25 processor through the
Freescale PDK evaluation board.
For now a limited set of devices is supported.
* GPT timers (from i.MX31)
* EPIT timers (from i.MX31)
* Serial ports (from i.MX31)
* Ethernet FEC port
* I2C controller
I
Quoting Alexey Kardashevskiy (2015-07-05 21:11:06)
> sPAPR IOMMU is managing two copies of an TCE table:
> 1) a guest view of the table - this is what emulated devices use and
> this is where H_GET_TCE reads from;
> 2) a hardware TCE table - only present if there is at least one vfio-pci
> device o
Juan, okay for me to pick it up together with a bunch of other Coverity
fixes?
Paolo
On 10/07/2015 21:08, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> The error checks I added used 'break' after the error, but I'm
> in a switch inside the while loop, so they need to
Le 09/07/2015 08:41, Peter Crosthwaite a écrit :
sorry accidental send, comments inline below.
On Wed, Jul 8, 2015 at 11:36 PM, Peter Crosthwaite
wrote:
On Wed, Jul 8, 2015 at 10:55 PM, Jean-Christophe DUBOIS
wrote:
Le 08/07/2015 22:49, Peter Crosthwaite a écrit :
On Wed, Jul 8, 2015 at 11:
Commit 59227d5d45bb3c31dc2118011691c35b3c00879c did not update the
code in tcg/tci/tcg-target.c for those two cases.
Signed-off-by: Stefan Weil
---
Peter, could you please apply this patch directly (after Richard's review)?
Maybe this is simpler than waiting for a pull request.
Regards
Stefan
Am 09.07.2015 um 18:58 schrieb Peter Maydell:
On 9 July 2015 at 17:49, Peter Maydell wrote:
Compilation of TCI was accidentally broken by the recent disassembler
changes:
CCx86_64-softmmu/arch_init.o
In file included from target-i386/cpu-qom.h:23:0,
from target-i386/cp
From: "Dr. David Alan Gilbert"
The error checks I added used 'break' after the error, but I'm
in a switch inside the while loop, so they need to be 'goto out'.
Spotted by coverity; entries 1311368 and 1311369
Fixes: afcddefd
Signed-off-by: Dr. David Alan Gilbert
---
migration/rdma.c | 8
Quoting arei.gong...@huawei.com (2015-07-09 19:51:28)
> From: Gonglei
>
> fix CID 1311373.
>
> Signed-off-by: Gonglei
Reviewed-by: Michael Roth
> ---
> hw/ppc/spapr_drc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c
> index ef98538..ee874
On Fri, 03 Jul 2015 13:28:45 +0200
Markus Armbruster wrote:
> Thomas Huth writes:
>
> > So far it is not possible to dump network traffic with the "-netdev"
> > option yet - this is only possible with the "-net" option and an
> > internal "hub".
> > This patch now fixes this ugliness by adding
On 07/10/2015 05:03 PM, Aurelien Jarno wrote:
Due to a copy&paste, the new op value is tested against mov_i32 instead
of movi_i32. The test is therefore always false. Fix that.
Cc: Richard Henderson
Signed-off-by: Aurelien Jarno
---
tcg/optimize.c | 2 +-
1 file changed, 1 insertion(+), 1 del
On 07/10/2015 05:03 PM, Aurelien Jarno wrote:
Cc: Richard Henderson
Signed-off-by: Aurelien Jarno
---
tcg/optimize.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson
r~
The Xilinx EP108 has four separate OCM banks which are located
adjacent to each other. This patch adds the four banks to
the ZynqMP SoC.
Signed-off-by: Alistair Francis
---
hw/arm/xlnx-zynqmp.c | 13 +
include/hw/arm/xlnx-zynqmp.h |6 ++
2 files changed, 19 inserti
On Fri, 03 Jul 2015 13:06:55 +0200
Markus Armbruster wrote:
> Thomas Huth writes:
>
> > Adding a proper receive_iov function to the net dump module. This
> > will make it easier to support the dump feature for the -netdev
> > option in later patches.
> > Also make the receive functions availabl
Yes, It will be usefull for testing the guest code. Currently virtio-blk
does not returns the multi-queue in feature flag of virtio, so no way
testing the feature in the guest driver.
In the virtio-net, multi-queue feature can be enabled and tested.
Thanks
Jana
On 9 July 2015 at 18:59, Micha
Thanks Stefan,
It's a small bug in the virtio-blk driver in my kernel. After fixing
, It works as expected.
Jana
On 9 July 2015 at 16:31, Stefan Hajnoczi wrote:
> On Tue, Jul 07, 2015 at 10:50:59PM +0530, Naredula Janardhana Reddy wrote:
> > How to enable MSIX for virtio-blk, this is to
2015-07-10 14:56+0100, Peter Maydell:
> On 10 July 2015 at 14:38, Peter Maydell wrote:
>> On 10 July 2015 at 14:31, Radim Krčmář wrote:
>>> We pass 'ctx' as a 'void *' in the code, but these functions accept
>>> specialized structures, which makes them incompatible:
>>>
>>> void nettle_cipher_f
Calling a function pointer that was cast from an incompatible function
results in undefined behavior. 'void *' isn't compatible with 'struct
XXX *', so we can't cast to nettle_cipher_func, but have to provide a
wrapper. (Conversion from 'void *' to 'struct XXX *' might require
computation, which
It's horrible both ways and I prefer this one.
Signed-off-by: Radim Krčmář
---
crypto/cipher-nettle.c | 47 +--
1 file changed, 17 insertions(+), 30 deletions(-)
diff --git a/crypto/cipher-nettle.c b/crypto/cipher-nettle.c
index 61f1cd3417d3..78b6b05a
In nettle 3, cbc_encrypt() accepts 'nettle_cipher_func' instead of
'nettle_crypt_func' and these two differ in 'const' qualifier of the
first argument. The build fails with:
In file included from crypto/cipher.c:71:0:
./crypto/cipher-nettle.c: In function ‘qcrypto_cipher_encrypt’:
./crypto/
[1/3] fixes a build problem with new nettle libraries.
Peter Maydell found a potential undefined behavior with some architectures that
is fixed in [2/3]. (I haven't checked if QEMU runs on one.)
[3/3] refactors [2/3]; feel free to squish or drop it.
Radim Krčmář (3):
crypto: fix build with net
On 08.07.2015 21:36, Kevin Wolf wrote:
This is the counterpart for bdrv_open_child(). It decreases the
reference count of the child BDS and removes it from the list of
children of the given parent BDS.
Signed-off-by: Kevin Wolf
---
block.c | 23 +--
include/
Am 10.07.2015 um 17:51 hat Max Reitz geschrieben:
> On 08.07.2015 21:36, Kevin Wolf wrote:
> >It is the same as bdrv_open_image(), except that it doesn't only return
> >success or failure, but the newly created BdrvChild object for the new
> >child node.
> >
> >As the BdrvChild object already conta
On 08.07.2015 21:36, Kevin Wolf wrote:
This patch moves bdrv_attach_child() from the individual places that add
a backing file to a BDS to bdrv_set_backing_hd(), which is called by all
of them. It also adds bdrv_detach_child() there.
For normal operation (starting with one backing file chain and
From: KONRAD Frederic
This flag indicates if the VCPU is currently executing TCG code.
Signed-off-by: KONRAD Frederic
Changes V1 -> V2:
* do both tcg_executing = 0 or 1 in cpu_exec().
---
cpu-exec.c| 2 ++
include/qom/cpu.h | 3 +++
qom/cpu.c | 1 +
3 files changed, 6 insert
From: KONRAD Frederic
We already had async_run_on_cpu but we need all VCPUs outside their execution
loop to execute some tb_flush/invalidate task:
async_run_on_cpu_safe schedule a work on a VCPU but the work start when no more
VCPUs are executing code.
When a safe work is pending cpu_has_work re
From: KONRAD Frederic
This is the async_safe_work introduction bit of the Multithread TCG work.
Rebased on current upstream (6169b60285fe1ff730d840a49527e721bfb30899).
It can be cloned here:
http://git.greensocs.com/fkonrad/mttcg.git branch async_work_v2
The first patch introduces a mutex to pr
From: KONRAD Frederic
This protects queued_work_* used by async_run_on_cpu, run_on_cpu and
flush_queued_work with a new lock (work_mutex) to prevent multiple (concurrent)
access.
Signed-off-by: KONRAD Frederic
Changes V1 -> V2:
* Unlock the mutex while running the callback.
---
cpus.c
On 08.07.2015 21:36, Kevin Wolf wrote:
Block drivers may still want to access their child nodes in their
.bdrv_close handler. If they unref and/or detach a child by themselves,
this should not result in a double free.
There is additional code for backing files, which are just a special
case of c
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants
Due to a copy&paste, the new op value is tested against mov_i32 instead
of movi_i32. The test is therefore always false. Fix that.
Cc: Richard Henderson
Signed-off-by: Aurelien Jarno
---
tcg/optimize.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/optimize.c b/tcg/opti
On 08.07.2015 21:36, Kevin Wolf wrote:
It is the same as bdrv_open_image(), except that it doesn't only return
success or failure, but the newly created BdrvChild object for the new
child node.
As the BdrvChild object already contains a BlockDriverState pointer (and
this is supposed to become th
On 5 June 2015 at 16:15, Paolo Bonzini wrote:
> framebuffer.c expects DIRTY_MEMORY_VGA logging to be always on, but that
> will not be the case soon. Because framebuffer.c computes the memory
> region on the fly for every update (with memory_region_find), it cannot
> enable/disable logging by its
Laszlo Ersek writes:
> On 07/10/15 16:59, Paolo Bonzini wrote:
>>
>>
>> On 10/07/2015 16:57, Laszlo Ersek wrote:
> ... In any case, please understand that I'm not campaigning for this
> warning :) IIRC the warning was your (very welcome!) idea after I
> reported the problem; I'm jus
On 10/07/2015 17:34, Paolo Bonzini wrote:
On 10/07/2015 17:32, Frederic Konrad wrote:
I think something like that can work because we don't have two
flush_queued_work at the same time on the same CPU?
Yes, this works; there is only one consumer.
Holding locks within a callback can be very pai
> > > > Yes, you're right. The reason is surely because dimm1 wasn't deleted
> > > > -- and I think I didn't make my point very clear -- my question was
> > > > more about: Is there any reason for dimm1 not being deleted? The
> > > > reason why I tested with the guest OS fully running and on GRUB i
On 10/07/2015 17:32, Frederic Konrad wrote:
>>>
>
> I think something like that can work because we don't have two
> flush_queued_work at the same time on the same CPU?
Yes, this works; there is only one consumer.
Holding locks within a callback can be very painful, especially if there
is a ch
From: KONRAD Frederic
We already had async_run_on_cpu but we need all VCPUs outside their execution
loop to execute some tb_flush/invalidate task:
async_run_on_cpu_safe schedule a work on a VCPU but the work start when no more
VCPUs are executing code.
When a safe work is pending cpu_has_work re
On 08.07.2015 21:36, Kevin Wolf wrote:
Let the callers of bdrv_open_inherit() call bdrv_attach_child(). It
needs to be called in all cases where bdrv_open_inherit() succeeds (i.e.
returns 0) and a child_role is given.
bdrv_attach_child() is moved upwards to avoid a forward declaration.
Signed-o
On 10/07/2015 17:22, Paolo Bonzini wrote:
On 10/07/2015 17:19, fred.kon...@greensocs.com wrote:
+qemu_mutex_lock(&cpu->work_mutex);
while ((wi = cpu->queued_work_first)) {
cpu->queued_work_first = wi->next;
wi->func(wi->data);
Please unlock the mutex while calling
On 10/07/2015 17:19, fred.kon...@greensocs.com wrote:
> +static void flush_queued_safe_work(CPUState *cpu)
> +{
> +struct qemu_work_item *wi;
> +CPUState *other_cpu;
> +
> +if (cpu->queued_safe_work_first == NULL) {
> +return;
> +}
> +
> +CPU_FOREACH(other_cpu) {
> +
On 10/07/2015 17:19, fred.kon...@greensocs.com wrote:
> +qemu_mutex_lock(&cpu->work_mutex);
> while ((wi = cpu->queued_work_first)) {
> cpu->queued_work_first = wi->next;
> wi->func(wi->data);
Please unlock the mutex while calling the callback.
Paolo
> @@ -905,6 +912
From: KONRAD Frederic
This flag indicates if the VCPU is currently executing TCG code.
Signed-off-by: KONRAD Frederic
Changes V1 -> V2:
* do both tcg_executing = 0 or 1 in cpu_exec().
---
cpu-exec.c| 2 ++
include/qom/cpu.h | 3 +++
qom/cpu.c | 1 +
3 files changed, 6 insert
From: KONRAD Frederic
This protects queued_work_* used by async_run_on_cpu, run_on_cpu and
flush_queued_work with a new lock (work_mutex) to prevent multiple (concurrent)
access.
Signed-off-by: KONRAD Frederic
---
cpus.c| 9 +
include/qom/cpu.h | 3 +++
qom/cpu.c |
From: KONRAD Frederic
This is the async_safe_work introduction bit of the Multithread TCG work.
Rebased on current upstream (6169b60285fe1ff730d840a49527e721bfb30899).
It can be cloned here:
http://git.greensocs.com/fkonrad/mttcg.git branch async_work
The first patch introduces a mutex to prote
On 07/10/15 16:59, Paolo Bonzini wrote:
>
>
> On 10/07/2015 16:57, Laszlo Ersek wrote:
... In any case, please understand that I'm not campaigning for this
warning :) IIRC the warning was your (very welcome!) idea after I
reported the problem; I'm just trying to ensure that the war
On 10/07/2015 16:57, Laszlo Ersek wrote:
> > > ... In any case, please understand that I'm not campaigning for this
> > > warning :) IIRC the warning was your (very welcome!) idea after I
> > > reported the problem; I'm just trying to ensure that the warning match
> > > the exact issue I encounte
On 07/10/15 16:13, Paolo Bonzini wrote:
>
>
> On 09/07/2015 20:57, Laszlo Ersek wrote:
>>> Without EPT, you don't
>>> hit the processor limitation with your setup, but the user should
>>> nevertheless
>>> still be notified.
>>
>> I disagree.
>
> FWIW, I also disagree (and it looks like Bandan d
Public bug reported:
Currently qemu-system-alpha -bios parameter takes an ELF image.
However HP maintains firmware updates for those systems.
Some example rom files can be found here
ftp://ftp.hp.com/pub/alphaserver/firmware/current_platforms/v7.3_release/DS20_DS20e/
It might allow things like u
* Juan Quintela (quint...@redhat.com) wrote:
> We use global state in both savevm & migration. The easiest way is to
> put the setup in a single place.
>
> Signed-off-by: Juan Quintela
I don't think this works; I think pre-save is called after the migration
code has changed the runstate, so yo
On 09/07/2015 20:57, Laszlo Ersek wrote:
>> Without EPT, you don't
>> hit the processor limitation with your setup, but the user should
>> nevertheless
>> still be notified.
>
> I disagree.
FWIW, I also disagree (and it looks like Bandan disagrees with himself
now :)).
>> In fact, I think sha
2015-07-10 14:38+0100, Peter Maydell:
> On 10 July 2015 at 14:31, Radim Krčmář wrote:
>> 2015-07-10 13:56+0100, Peter Maydell:
>>> On 10 July 2015 at 13:33, Radim Krčmář wrote:
@@ -83,8 +87,8 @@ QCryptoCipher *qcrypto_cipher_new(QCryptoCipherAlgorithm
alg,
-ctx->alg_encryp
On 10 July 2015 at 14:38, Peter Maydell wrote:
> On 10 July 2015 at 14:31, Radim Krčmář wrote:
>> We pass 'ctx' as a 'void *' in the code, but these functions accept
>> specialized structures, which makes them incompatible:
>>
>> void nettle_cipher_func(const void *ctx, size_t length, [...])
>>
On 10 July 2015 at 14:31, Radim Krčmář wrote:
> 2015-07-10 13:56+0100, Peter Maydell:
>> On 10 July 2015 at 13:33, Radim Krčmář wrote:
>>> @@ -83,8 +87,8 @@ QCryptoCipher *qcrypto_cipher_new(QCryptoCipherAlgorithm
>>> alg,
>>> -ctx->alg_encrypt = (nettle_crypt_func *)des_encrypt;
>>> -
2015-07-10 13:56+0100, Peter Maydell:
> On 10 July 2015 at 13:33, Radim Krčmář wrote:
>> @@ -83,8 +87,8 @@ QCryptoCipher *qcrypto_cipher_new(QCryptoCipherAlgorithm
>> alg,
>> -ctx->alg_encrypt = (nettle_crypt_func *)des_encrypt;
>> -ctx->alg_decrypt = (nettle_crypt_func *)des_decr
On 09/07/15 04:30, Michael Roth wrote:
Quoting Denis V. Lunev (2015-07-08 17:47:51)
On 09/07/15 01:02, Michael Roth wrote:
Quoting Denis V. Lunev (2015-07-07 03:06:08)
On 07/07/15 04:31, Michael Roth wrote:
Quoting Denis V. Lunev (2015-06-30 05:25:19)
From: Olga Krishtal
Child process' std
Am 10.07.2015 um 14:58 schrieb Juan Quintela:
> Hi
>
> Store global state for both savevm & migration in a single place.
> Register globalstate save handler before loadvm happens.
>
> Please, review.
>
> Juan Quintela (2):
> migration: Register global state section before loadvm
> migration:
On 26/06/2015 11:22, Thibaut Collet wrote:
> Some vhost client/backend are able to support live migration.
> To provide this service the following features must be added:
> 1. Add the VIRTIO_NET_F_GUEST_ANNOUNCE capability to vhost-net when netdev
>backend is vhost-user.
> 2. Provide a nop re
Hi
Store global state for both savevm & migration in a single place.
Register globalstate save handler before loadvm happens.
Please, review.
Juan Quintela (2):
migration: Register global state section before loadvm
migration: store globalstate in pre_safe
migration/migration.c | 30 ++
Otherwise, it is not found
Signed-off-by: Juan Quintela
---
vl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index 3f269dc..5856396 100644
--- a/vl.c
+++ b/vl.c
@@ -4615,6 +4615,7 @@ int main(int argc, char **argv, char **envp)
}
qemu_system_reset(V
We use global state in both savevm & migration. The easiest way is to
put the setup in a single place.
Signed-off-by: Juan Quintela
---
migration/migration.c | 30 --
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/migration/migration.c b/migration/mi
On 10 July 2015 at 13:33, Radim Krčmář wrote:
> In nettle 3, cbc_encrypt() accepts 'nettle_cipher_func' instead of
> 'nettle_crypt_func' and these two differ in 'const' qualifier of the
> first argument. The build fails with:
>
> In file included from crypto/cipher.c:71:0:
> ./crypto/cipher-n
On 10/07/2015 02:51, arei.gong...@huawei.com wrote:
> From: Gonglei
>
> Spotted by Coverity.
>
> Gonglei (4):
> cpu: fix memory leak
> ppc/spapr_drc: fix memory leak
> arm/xlnx-zynqmp: fix memory leak
> vl.c: fix memory leak
>
> hw/arm/xlnx-zynqmp.c | 4 ++--
> hw/ppc/spapr_drc.c |
In nettle 3, cbc_encrypt() accepts 'nettle_cipher_func' instead of
'nettle_crypt_func' and these two differ in 'const' qualifier of the
first argument. The build fails with:
In file included from crypto/cipher.c:71:0:
./crypto/cipher-nettle.c: In function ‘qcrypto_cipher_encrypt’:
./crypto/
Hi again,
I have redone a lot of tests,
with raw on nfs
---
Patch 3/3, fix my problem (not apply patch 1/3 and patch 2/3).
without patch 3/3, I'm seeing a lot of lseek, can take some minutes with guest
hang.
with patch 3/3, it almost take no time to generate the bitmap, no guest h
On 10/07/2015 12:24, Paolo Bonzini wrote:
On 10/07/2015 11:47, alvise rigo wrote:
I tried to use it, but it would then create a deadlock at a very early
stage of the stress test.
The problem is likely related to the fact that flush_queued_work
happens with the global mutex locked.
Let's fix th
On 10/07/2015 9:26 pm, "Peter Maydell" wrote:
>
> On 10 July 2015 at 12:23, Edgar E. Iglesias
wrote:
> >
> > On 10/07/2015 7:58 pm, "Peter Maydell" wrote:
> >> Something I just noticed while I was trying to add support
> >> for the secure physical timer on top of this series: the
> >> gt_*_cnt_r
On 10 July 2015 at 12:23, Edgar E. Iglesias wrote:
>
> On 10/07/2015 7:58 pm, "Peter Maydell" wrote:
>> Something I just noticed while I was trying to add support
>> for the secure physical timer on top of this series: the
>> gt_*_cnt_reset functions are misnamed, because they're not
>> resetting
On 10/07/2015 7:58 pm, "Peter Maydell" wrote:
>
> On 16 June 2015 at 02:51, Edgar E. Iglesias
wrote:
> > From: "Edgar E. Iglesias"
> >
> > Signed-off-by: Edgar E. Iglesias
> > ---
> > target-arm/cpu-qom.h | 1 +
> > target-arm/cpu.c | 2 ++
> > target-arm/cpu.h | 3 ++-
> > target-a
On 10 July 2015 at 12:00, Christoffer Dall wrote:
> Some registers like the CNTVCT register should only be written to the
> kernel as part of machine initialization or on vmload operations, but
> never during runtime, as this can potentially make time go backwards or
> create inconsistent time obs
As full specification of P5600 is available, mips32r5-generic should
be renamed to P5600 and corrected as its intention.
Correct PRid and detail of configuration.
Features which are not currently supported are described as FIXME.
Fix Config.MM bit location
Signed-off-by: Yongbok Kim
---
target-
Correct computation of vector offsets for EXCP_EXT_INTERRUPT.
For instance, if Cause.IV is 0 the vector offset should be 0x180.
Simplify the finding vector number logic for the Vectored Interrupts.
Signed-off-by: Yongbok Kim
---
target-mips/helper.c| 47 ++-
Some registers like the CNTVCT register should only be written to the
kernel as part of machine initialization or on vmload operations, but
never during runtime, as this can potentially make time go backwards or
create inconsistent time observations between VCPUs.
Introduce a list of registers tha
This makes use of the new "memory registering" feature. The idea is
to provide the userspace ability to notify the host kernel about pages
which are going to be used for DMA. Having this information, the host
kernel can pin them all once per user process, do locked pages
accounting (once) and not s
In some cases PCI BARs are registered as RAM via
memory_region_init_ram_ptr() and the vfio_memory_listener will be called
on them too. However DMA will not be performed to/from these regions so
just skip them.
Signed-off-by: Alexey Kardashevskiy
---
hw/vfio/common.c | 3 ++-
1 file changed, 2 in
1 - 100 of 158 matches
Mail list logo
