Re: [Qemu-devel] [PATCH v7 5/6] s390x/cpu: Add error handling to cpu creation

> >> +static void s390_cpu_get_id(Object *obj, Visitor *v, const char *name, > >> +void *opaque, Error **errp) > >> +{ > >> +S390CPU *cpu = S390_CPU(obj); > >> +int64_t value = cpu->id; > >> + > >> +visit_type_int(v, name, , errp); > >> +} > >> + > >>

Re: [Qemu-devel] [PATCH v3] net: check packet payload length

On 03/02/2016 07:59 PM, P J P wrote: > From: Prasad J Pandit > > While computing IP checksum, 'net_checksum_calculate' reads > payload length from the packet. It could exceed the given 'data' > buffer size. Add a check to avoid it. > > Reported-by: Liu Ling

Re: [Qemu-devel] [PATCH V2 1/3] net/filter-traffic: add filter-traffic.h

On 03/03/2016 03:20 PM, Zhang Chen wrote: > > > On 03/03/2016 02:48 PM, Jason Wang wrote: >> >> On 03/02/2016 03:25 PM, Zhang Chen wrote: >>> >>> On 03/02/2016 02:19 PM, Jason Wang wrote: On 02/29/2016 08:23 PM, Zhang Chen wrote: > We can reuse filter-traffic by filter-mirror, >

Re: [Qemu-devel] [PATCH V2 1/3] net/filter-traffic: add filter-traffic.h

On 03/03/2016 02:48 PM, Jason Wang wrote: On 03/02/2016 03:25 PM, Zhang Chen wrote: On 03/02/2016 02:19 PM, Jason Wang wrote: On 02/29/2016 08:23 PM, Zhang Chen wrote: We can reuse filter-traffic by filter-mirror, filter-redirector and so on. I think we could share more than this. E.g

Re: [Qemu-devel] [PATCH v2 11/19] qapi: Add type.is_empty() helper

Eric Blake writes: > On 03/02/2016 12:04 PM, Markus Armbruster wrote: >> Eric Blake writes: >> >>> And use it in qapi-types and qapi-event. Down the road, we may >>> want to lift our artificial restriction of no variants at the >>> top level of an event,

Re: [Qemu-devel] [PATCH 24/38] ivshmem: Propagate errors through ivshmem_recv_setup()

Marc-André Lureau writes: > Hi > > On Wed, Mar 2, 2016 at 8:35 PM, Markus Armbruster wrote: >> You know, I'd prefer that, too, and I've argued for it unsuccessfully. >> As it is, we fairly consistently return void when the function returns >>

Re: [Qemu-devel] [PATCH v2 11/19] qapi: Add type.is_empty() helper

Eric Blake writes: > On 03/02/2016 12:04 PM, Markus Armbruster wrote: >> Eric Blake writes: >> >>> And use it in qapi-types and qapi-event. Down the road, we may >>> want to lift our artificial restriction of no variants at the >>> top level of an event,

Re: [Qemu-devel] [PATCH 1/3] arm: gic: add GICType

On Thu, Mar 03, 2016 at 07:34:21AM +0100, Markus Armbruster wrote: > Peter Xu writes: > > I see that qapi-introspect branch is not there now. Is it merged to > > some other branch already? When will it be there in QEMU master > > (still not in, right?)? Just curious about it. >

Re: [Qemu-devel] [PATCH 4/7] target-i386: Dump illegal opcodes with -d unimp

Le 03/03/2016 06:30, Richard Henderson a écrit : Signed-off-by: Richard Henderson --- target-i386/translate.c | 22 +++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index b73c237..aa423cb

Re: [Qemu-devel] [PATCH 0/7] target-i386 fixes

Le 03/03/2016 06:30, Richard Henderson a écrit : This is primarily patches fixing Windows booting regressions introduced by myself. Many thanks to Herve for reporting them and Paolo for fixing two of them. Changes from patches previously seen on-list: * Tweak the bnd_jmp patch to test MPX

Re: [Qemu-devel] [PATCH V2 1/3] net/filter-traffic: add filter-traffic.h

On 03/02/2016 03:25 PM, Zhang Chen wrote: > > > On 03/02/2016 02:19 PM, Jason Wang wrote: >> >> On 02/29/2016 08:23 PM, Zhang Chen wrote: >>> We can reuse filter-traffic by filter-mirror, >>> filter-redirector and so on. >> I think we could share more than this. E.g just use filter-mirror.c to

Re: [Qemu-devel] [PATCH 1/3] arm: gic: add GICType

Peter Xu writes: > On Wed, Mar 02, 2016 at 02:59:57PM +0100, Markus Armbruster wrote: >> Peter Xu writes: >> > What's "query-schema"? Is that a QMP command? >> >> Yes. >> >> More than you ever wanted to know: >>

Re: [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/*

On 25 February 2016 at 10:30, xiaoqiang zhao wrote: This patch series QOM'ify timer code under hw/timer directory. Main idea is to split the initfn's work, some to TypeInfo.instance_init and some is placed in DeviceClass::realize. Drop the use of SysBusDeviceClass::init if

[Qemu-devel] [PATCH] hw/usb: whitespace fix in tusb6010.c

use spaces instead of Tabs Signed-off-by: xiaoqiang zhao --- hw/usb/tusb6010.c | 318 +++--- 1 file changed, 159 insertions(+), 159 deletions(-) diff --git a/hw/usb/tusb6010.c b/hw/usb/tusb6010.c index 9f6af90..4daa3a5 100644

[Qemu-devel] Doubts regarding parallelism on KVM, IO threads

Hi was trying to do some digging for multi core scenarios both with and without KVM. In short i have some devices and a user application that does some r/w operations on those devices. As per my understanding, in case binary translation using TCG is invoked, we only create a single Qemuthread

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 09/16] vfio: Generalize IOMMU memory listener

On 03/03/2016 04:36 PM, David Gibson wrote: On Tue, Mar 01, 2016 at 08:10:34PM +1100, Alexey Kardashevskiy wrote: At the moment VFIOContainer uses one memory listener which listens on PCI address space for both Type1 and sPAPR IOMMUs. Soon we will need another listener to listen on RAM; this

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 07/16] vfio, memory: Notify IOMMU about starting/stopping being used by VFIO

On 03/03/2016 04:28 PM, David Gibson wrote: On Tue, Mar 01, 2016 at 08:10:32PM +1100, Alexey Kardashevskiy wrote: This adds a vfio_votify() callback to inform an IOMMU (and then its owner) that VFIO started using the IOMMU. This is used by the pseries machine to enable/disable in-kernel

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 09/16] vfio: Generalize IOMMU memory listener

On Tue, Mar 01, 2016 at 08:10:34PM +1100, Alexey Kardashevskiy wrote: > At the moment VFIOContainer uses one memory listener which listens on > PCI address space for both Type1 and sPAPR IOMMUs. Soon we will need > another listener to listen on RAM; this will do DMA memory > pre-registration for

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 08/16] memory: Add reporting of supported page sizes

On Tue, Mar 01, 2016 at 08:10:33PM +1100, Alexey Kardashevskiy wrote: > Every IOMMU has some granularity which MemoryRegionIOMMUOps::translate > uses when translating, however this information is not available outside > the translate context for various checks. > > This adds a get_page_sizes

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 07/16] vfio, memory: Notify IOMMU about starting/stopping being used by VFIO

On Tue, Mar 01, 2016 at 08:10:32PM +1100, Alexey Kardashevskiy wrote: > This adds a vfio_votify() callback to inform an IOMMU (and then its owner) > that VFIO started using the IOMMU. This is used by the pseries machine to > enable/disable in-kernel acceleration of TCE hypercalls. > >

Re: [Qemu-devel] Performance Profiling 2 VMs

Thanks a lot for the quick reply Stefan Following from problem VM: 18:56:29 CPU %user %nice%sys %iowait%irq %soft %steal %idleintr/s 18:56:44 10.000.000.000.000.000.000.00 100.20 0.00 18:56:49 10.000.000.000.00

[Qemu-devel] [PATCH 4/7] target-i386: Dump illegal opcodes with -d unimp

Signed-off-by: Richard Henderson --- target-i386/translate.c | 22 +++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index b73c237..aa423cb 100644 --- a/target-i386/translate.c +++

[Qemu-devel] [PATCH 7/7] target-i386: Fix inhibit irq mask handling

The patch in 7f0b714 was too simplistic, in that we wound up setting the flag and then resetting it immediately in gen_eob. Fixes the reported boot problem with Windows XP. Reported-by: Hervé Poussineau Signed-off-by: Richard Henderson ---

[Qemu-devel] [PATCH 2/7] target-i386: fix smsw and lmsw from/to register

From: Paolo Bonzini SMSW and LMSW accept register operands, but commit 1906b2a ("target-i386: Rearrange processing of 0F 01", 2016-02-13) did not account for that. Fixes: 1906b2af7c2345037d9b2fdf484b457b5acd09d1 Cc: r...@twiddle.net Reported-by: Hervé Poussineau

[Qemu-devel] [PATCH 3/7] target-i386: Fix SMSW for 64-bit mode

In non-64-bit modes, the instruction always stores 16 bits. But in 64-bit mode, when the destination is a register, the instruction can write 32 or 64 bits. Signed-off-by: Richard Henderson --- target-i386/translate.c | 14 -- 1 file changed, 8 insertions(+), 6

[Qemu-devel] [PATCH 1/7] target-i386: avoid repeated calls to the bnd_jmp helper

From: Paolo Bonzini Two flags were tested the wrong way. Signed-off-by: Paolo Bonzini Message-Id: <1456845145-18891-1-git-send-email-pbonz...@redhat.com> Signed-off-by: Richard Henderson [rth: Fixed enable test as well.] ---

[Qemu-devel] [PATCH 5/7] target-i386: fix addr16 prefix

From: Paolo Bonzini While ADDSEG will only be false in 16-bit mode for LEA, it can be false even in other cases when 16-bit addresses are obtained via the 67h prefix in 32-bit mode. In this case, gen_lea_v_seg forgets to add a nonzero FS or GS base if CS/DS/ES/SS are all

[Qemu-devel] [PATCH 0/7] target-i386 fixes

This is primarily patches fixing Windows booting regressions introduced by myself. Many thanks to Herve for reporting them and Paolo for fixing two of them. Changes from patches previously seen on-list: * Tweak the bnd_jmp patch to test MPX enabled properly. * Dump illegal opcode data with

[Qemu-devel] [PATCH 6/7] target-i386: Use gen_nop_modrm for prefetch instructions

Signed-off-by: Richard Henderson --- target-i386/translate.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index ed54381..7455a18 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@

Re: [Qemu-devel] [Qemu-arm] [PATCH v2 2/3] hw/intc: Add (new) ASPEED AST2400 AVIC device model

On Thu, 2016-02-25 at 16:29 +, Peter Maydell wrote: > > +case 0x20: /* Interrupt Enable */ > > +s->int_enable |= data; > > Are you sure this only ORs in new 1 bits? As in, am I sure I only want to take the newly set bits? If so, yes, as the the following register serves to clear

Re: [Qemu-devel] [PATCH] rng-random: implement request queue

On (Thu) 04 Feb 2016 [13:07:35], Ladi Prosek wrote: > - Original Message - > > - Original Message - > > > > > > > > > On 03/02/2016 13:36, Amit Shah wrote: > > > > ... and this can lead to breaking migration (the queue of requests on > > > > the host needs to be migrated, else

Re: [Qemu-devel] [Qemu-ppc] [PATCH] target-ppc: fix sync of SPR_SDR1 with KVM

On Wed, Mar 02, 2016 at 11:06:19AM +1100, David Gibson wrote: > On Tue, Mar 01, 2016 at 07:03:10PM +0100, Greg Kurz wrote: > > The gdbstub can't access guest memory with current master. This is what you > > get in gdb: > > > > 0x19b8 in main (argc= > memory > > at address

Re: [Qemu-devel] [PATCH 1/3] arm: gic: add GICType

On Wed, Mar 02, 2016 at 02:59:57PM +0100, Markus Armbruster wrote: > Peter Xu writes: > > What's "query-schema"? Is that a QMP command? > > Yes. > > More than you ever wanted to know: > http://events.linuxfoundation.org/sites/events/files/slides/armbru-qemu-introspection.pdf

Re: [Qemu-devel] [PATCH v3 1/1] block/sheepdog: fix argument passed to qemu_strtoul()

On Thu, Mar 3, 2016 at 1:36 AM, Jeff Cody wrote: > On Wed, Mar 02, 2016 at 05:32:11PM +0100, Max Reitz wrote: > > On 02.03.2016 17:24, Jeff Cody wrote: > > > The function qemu_strtoul() reads 'unsigned long' sized data, > > > which is larger than uint32_t on 64-bit machines. >

Re: [Qemu-devel] [PATCH v3 1/1] block/sheepdog: fix argument passed to qemu_strtoul()

On Thu, Mar 3, 2016 at 1:24 AM, Jeff Cody wrote: > The function qemu_strtoul() reads 'unsigned long' sized data, > which is larger than uint32_t on 64-bit machines. > > Even though the snap_id field in the header is 32-bits, we must > accomodate the full size in qemu_strtoul().

Re: [Qemu-devel] [PATCH RFC v2 1/2] Add param Error** to msi_init() & modify the callers

hi, Markus Thanks for still remembering this patch, and quite a lot response:) I will give a appropriate response after I read & understand them all.(so, not cc other guys here) On 03/02/2016 05:13 PM, Markus Armbruster wrote: This got lost over the Christmas break, sorry. Cc'ing Marcel for

[Qemu-devel] Question regarding a special case VM communication

Hello, All, I am facing this special case of VM communication. I have a Linux host machine, on which two Qemu/KVM virtual machines are launched. Let's say they are VM1 and VM2, and their corresponding processes on the host are Qemu1 and Qemu2. Inside VM2, I need nested virtualization, i.e., A

[Qemu-devel] [PATCH] ui/cocoa.m: Allow console selection using keypad number keys

This patch allows for the user to use the keypad number keys to select a console. Signed-off-by: John Arbuckle --- This patch depends on this patch: http://patchwork.ozlabs.org/patch/591221/ ui/cocoa.m | 11 --- 1 file changed, 4 insertions(+), 7

[Qemu-devel] [PATCH v2] ui/cocoa.m: Replace pc/xt keyboard keycode array with QKeyCode

The old pc/xt keyboard keycode array is replaced with QEMU's own QKeyCode layout. Signed-off-by: John Arbuckle --- Removed dependency on MacKeys.h. Included Carbon.h. Replaced MacKeys' constants with Carbon's constants. Replaced numbers in handleEvent: with QKeyCode

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 04/16] spapr_iommu: Introduce "enabled" state for TCE table

On Tue, Mar 01, 2016 at 08:10:29PM +1100, Alexey Kardashevskiy wrote: > Currently TCE tables are created once at start and their sizes never > change. We are going to change that by introducing a Dynamic DMA windows > support where DMA configuration may change during the guest execution. > > This

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 06/16] spapr_pci: Reset DMA config on PHB reset

On Tue, Mar 01, 2016 at 08:10:31PM +1100, Alexey Kardashevskiy wrote: > LoPAPR dictates that during system reset all DMA windows must be removed > and the default DMA32 window must be created so does the patch. > > At the moment there is just one window supported so no change in > behaviour is

Re: [Qemu-devel] [PATCH 2/2] hw/9pfs: fix alignment issue when host filesystem block size is larger than client msize

Any further question/comment on this patch? Thanks, Jevon On 24/2/16 15:04, Jevon Qiao wrote: [Removing ceph-devel alias] Hi Aneesh, Any further comment on my reply below? Thanks, Jevon On 19/2/16 16:56, Jevon Qiao wrote: Hi Aneesh, I am not sure I understand the details correctly. iounit

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 01/16] memory: Fix IOMMU replay base address

On Tue, Mar 01, 2016 at 08:10:26PM +1100, Alexey Kardashevskiy wrote: > Since a788f227 "memory: Allow replay of IOMMU mapping notifications" > when new VFIO listener is added, all existing IOMMU mappings are > replayed. However there is a problem that the base address of > an IOMMU memory region

Re: [Qemu-devel] [Qemu-ppc] [PATCH qemu v13 02/16] spapr_pci: Move DMA window enablement to a helper

On Tue, Mar 01, 2016 at 08:10:27PM +1100, Alexey Kardashevskiy wrote: > We are going to have multiple DMA windows soon so let's start preparing. > > This adds a new helper to create a DMA window and makes use of it in > sPAPRPHBState::realize(). > > Signed-off-by: Alexey Kardashevskiy

[Qemu-devel] [PATCH qemu] spapr-pci: Make MMIO spacing a machine property and increase it

The pseries machine supports multiple PHBs. Each PHB's MMIO/IO space is mapped to the CPU address space starting at SPAPR_PCI_WINDOW_BASE plus some offset which is calculated from PHB's index and SPAPR_PCI_WINDOW_SPACING which is defined now as 64GB. Since the default 32bit DMA window is using

Re: [Qemu-devel] [PATCH v4 04/26] crypto: add support for anti-forensic split algorithm

On 02/29/2016 05:00 AM, Daniel P. Berrange wrote: > The LUKS format specifies an anti-forensic split algorithm which > is used to artificially expand the size of the key material on > disk. This is an implementation of that algorithm. > > Signed-off-by: Daniel P. Berrange >

Re: [Qemu-devel] [PATCH qemu] target-ppc: Add PVR for POWER8NVL processor

On Thu, Mar 03, 2016 at 11:08:19AM +1100, Alexey Kardashevskiy wrote: > This adds a new POWER8+NVLink CPU PVR which core is identical to POWER8 > but has a different PVR. The only available machine now has PVR > pvr 004c 0100 so this defines "POWER8NVL" alias as v1.0. > > The corresponding kernel

Re: [Qemu-devel] [PATCH v4 03/26] crypto: add support for generating initialization vectors

On 02/29/2016 05:00 AM, Daniel P. Berrange wrote: > There are a number of different algorithms that can be used > to generate initialization vectors for disk encryption. This > introduces a simple internal QCryptoBlockIV object to provide > a consistent internal API to the different algorithms.

[Qemu-devel] [PATCH v15] block/raw-posix.c: Make physical devices usable in QEMU under Mac OS X host

Mac OS X can be picky when it comes to allowing the user to use physical devices in QEMU. Most mounted volumes appear to be off limits to QEMU. If an issue is detected, a message is displayed showing the user how to unmount a volume. Now QEMU uses both CD and DVD media. Signed-off-by: John

Re: [Qemu-devel] [PATCH v4 02/26] crypto: add support for PBKDF2 algorithm

On 02/29/2016 05:00 AM, Daniel P. Berrange wrote: > The LUKS data format includes use of PBKDF2 (Password-Based > Key Derivation Function). The Nettle library can provide > an implementation of this, but we don't want code directly > depending on a specific crypto library backend. Introduce > a

Re: [Qemu-devel] [PATCH 0/3] ppc: Define some more SPRs of POWER8 in QEMU to fix migration

On Wed, Mar 02, 2016 at 09:19:19PM +0100, Thomas Huth wrote: > While tinkering with the new kvm-unit-tests framework for Power, > I discovered that a couple of SPRs are destroyed during migration. > We've got to define them in QEMU and make sure that they are > synchronized with the kernel to make

[Qemu-devel] [PATCH qemu] target-ppc: Add PVR for POWER8NVL processor

This adds a new POWER8+NVLink CPU PVR which core is identical to POWER8 but has a different PVR. The only available machine now has PVR pvr 004c 0100 so this defines "POWER8NVL" alias as v1.0. The corresponding kernel commit is https://github.com/torvalds/linux/commit/ddee09c099c3 "powerpc: Add

Re: [Qemu-devel] [PATCH 24/38] ivshmem: Propagate errors through ivshmem_recv_setup()

Hi On Wed, Mar 2, 2016 at 8:35 PM, Markus Armbruster wrote: > You know, I'd prefer that, too, and I've argued for it unsuccessfully. > As it is, we fairly consistently return void when the function returns > errors through Error ** and has no non-error value. Good to know we

Re: [Qemu-devel] [PATCH 22/38] ivshmem: Plug leaks on unplug, fix peer disconnect

On Wed, Mar 2, 2016 at 8:19 PM, Markus Armbruster wrote: > When called from process_msg_disconnect(): invalid as long as > ivshmem-spec.txt doesn't assign a sane meaning to it. Let's make it an > error there, okay? Sounds find to me too thanks -- Marc-André Lureau

Re: [Qemu-devel] [PATCH v2 11/19] qapi: Add type.is_empty() helper

On 03/02/2016 12:04 PM, Markus Armbruster wrote: > Eric Blake writes: > >> And use it in qapi-types and qapi-event. Down the road, we may >> want to lift our artificial restriction of no variants at the >> top level of an event, at which point, inlining our check for >>

Re: [Qemu-devel] [PATCH v7 5/6] s390x/cpu: Add error handling to cpu creation

On 03/02/2016 02:59 AM, David Hildenbrand wrote: >> Check for and propogate errors during s390 cpu creation. >> >> Signed-off-by: Matthew Rosato >> --- >> hw/s390x/s390-virtio-ccw.c | 30 + >> hw/s390x/s390-virtio.c | 2 +- >>

Re: [Qemu-devel] [V6 4/4] hw/pci-host: Emulate AMD IOMMU

On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin wrote: > On Thu, Mar 03, 2016 at 12:09:28AM +0300, David Kiarie wrote: >> >> >> On 22/02/16 14:22, Marcel Apfelbaum wrote: >> >On 02/21/2016 08:11 PM, David Kiarie wrote: >> >>Add AMD IOMMU emulation support to q35 chipset >> >>

Re: [Qemu-devel] [PATCH] target-arm: Fix translation level on early translation faults

On 02.03.2016 21:04, Sergey Sorokin wrote: Qemu reports translation fault on 1st level instead of 0th level in case of AArch64 address translation if the translation table walk is disabled or the address is in the gap between the two regions. Signed-off-by: Sergey Sorokin

Re: [Qemu-devel] [V6 0/4] AMD IOMMU

On Thu, Mar 03, 2016 at 12:17:27AM +0300, David Kiarie wrote: > > > On 01/03/16 16:48, Jan Kiszka wrote: > >On 2016-03-01 14:07, Michael S. Tsirkin wrote: > >>On Sun, Feb 21, 2016 at 09:10:56PM +0300, David Kiarie wrote: > >>>Hello there, > >>> > >>>Repost, AMD IOMMU patches version 6. > >>> >

Re: [Qemu-devel] [V6 0/4] AMD IOMMU

On 01/03/16 16:48, Jan Kiszka wrote: On 2016-03-01 14:07, Michael S. Tsirkin wrote: On Sun, Feb 21, 2016 at 09:10:56PM +0300, David Kiarie wrote: Hello there, Repost, AMD IOMMU patches version 6. Changes since version 5 -Fixed macro formating issues -changed occurences of IO MMU to

Re: [Qemu-devel] [V6 4/4] hw/pci-host: Emulate AMD IOMMU

On Thu, Mar 03, 2016 at 12:09:28AM +0300, David Kiarie wrote: > > > On 22/02/16 14:22, Marcel Apfelbaum wrote: > >On 02/21/2016 08:11 PM, David Kiarie wrote: > >>Add AMD IOMMU emulation support to q35 chipset > >> > >>Signed-off-by: David Kiarie > >>--- > >>

Re: [Qemu-devel] [V6 2/4] hw/core: Add AMD IOMMU to machine properties

On 21/02/16 23:09, Jan Kiszka wrote: On 2016-02-21 19:10, David Kiarie wrote: diff --git a/qemu-options.hx b/qemu-options.hx index 2f0465e..dad160f 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -38,7 +38,7 @@ DEF("machine", HAS_ARG, QEMU_OPTION_machine, \ "

Re: [Qemu-devel] [PATCH 72/77] ppc: A couple more dummy POWER8 Book4 regs

On 11.11.2015 01:28, Benjamin Herrenschmidt wrote: > WORT and PID this time > > Signed-off-by: Benjamin Herrenschmidt > --- > target-ppc/cpu.h| 2 ++ > target-ppc/translate_init.c | 16 > 2 files changed, 14 insertions(+), 4 deletions(-) >

Re: [Qemu-devel] [PATCH 71/77] ppc: Add dummy ACOP SPR

On 11.11.2015 01:28, Benjamin Herrenschmidt wrote: > Signed-off-by: Benjamin Herrenschmidt > --- > target-ppc/cpu.h| 1 + > target-ppc/translate_init.c | 4 > 2 files changed, 5 insertions(+) > > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index

[Qemu-devel] [PATCH 3/3] ppc: Add a few more P8 PMU SPRs

From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt --- target-ppc/cpu.h| 7 +++ target-ppc/translate_init.c | 28 2 files changed, 35 insertions(+) diff --git a/target-ppc/cpu.h

[Qemu-devel] [PATCH 2/3] ppc: Fix migration of the TAR SPR

The TAR special purpose register currently does not get migrated under KVM because it does not get synchronized with the kernel. Use spr_register_kvm() instead of spr_register() to fix this issue. Signed-off-by: Thomas Huth --- target-ppc/translate_init.c | 8 1 file

[Qemu-devel] [PATCH 0/3] ppc: Define some more SPRs of POWER8 in QEMU to fix migration

While tinkering with the new kvm-unit-tests framework for Power, I discovered that a couple of SPRs are destroyed during migration. We've got to define them in QEMU and make sure that they are synchronized with the kernel to make sure that the register contents are not lost. The first patch

[Qemu-devel] [PATCH 1/3] ppc: Define the PSPB register on POWER8

POWER8 / PowerISA 2.07 has a new special purpose register called PSPB ("Problem State Priority Boost Register"). The contents of this register are currently lost during migration. To be able to migrate this register, too, we've got to define this SPR along with the other SPRs of POWER8.

Re: [Qemu-devel] [PATCH v2 11/19] qapi: Add type.is_empty() helper

On 03/02/2016 12:04 PM, Markus Armbruster wrote: > Eric Blake writes: > >> And use it in qapi-types and qapi-event. Down the road, we may >> want to lift our artificial restriction of no variants at the >> top level of an event, at which point, inlining our check for >>

[Qemu-devel] [PATCH v2 1/2] trace: include CPU index in trace_memory_region_*()

Knowing which CPU performed an action is essential for understanding SMP guest behavior. However, cpu_physical_memory_rw() may be executed by a machine init function, before any VCPUs are running, when there is no CPU running ('current_cpu' is NULL). In this case, store -1 in the trace record as

[Qemu-devel] [PATCH v2 2/2] trace: separate MMIO tracepoints from TB-access tracepoints

Memory accesses to code which has previously been translated into a TB show up in the MMIO path, so that they may invalidate the TB. It's extremely confusing to mix those in with device MMIOs, so split them into their own tracepoint. Signed-off-by: Hollis Blanchard

Re: [Qemu-devel] [PATCH v2 01/19] qapi: Rename 'fields' to 'members' in internal interface

On 03/02/2016 10:15 AM, Markus Armbruster wrote: > Eric Blake writes: > >> C types and JSON objects don't have fields, but members. We >> shouldn't gratuitously invent terminology. This patch is a >> strict renaming of generator code and static genarated functions, >> plus

Re: [Qemu-devel] [PATCH v7 5/6] s390x/cpu: Add error handling to cpu creation

>> +static void s390_cpu_get_id(Object *obj, Visitor *v, const char *name, >> +void *opaque, Error **errp) >> +{ >> +S390CPU *cpu = S390_CPU(obj); >> +int64_t value = cpu->id; >> + >> +visit_type_int(v, name, , errp); >> +} >> + >> +static void

Re: [Qemu-devel] [PATCH 33/38] ivshmem: Replace int role_val by OnOffAuto master

Marc-André Lureau writes: > Hi > > On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: >> In preparation of making it a qdev property. >> >> Signed-off-by: Markus Armbruster >> -- >> hw/misc/ivshmem.c | 31

Re: [Qemu-devel] [PATCH 27/38] ivshmem: Simplify how we cope with short reads from server

Marc-André Lureau writes: > Hi > > On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: >> Short reads from a UNIX domain sockets are exceedingly unlikely when >> the other side always sends eight bytes and we always read eight >> bytes. We

Re: [Qemu-devel] [PATCH 24/38] ivshmem: Propagate errors through ivshmem_recv_setup()

Marc-André Lureau writes: > On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: >> This kills off the funny state described in the previous commit. >> >> Simplify ivshmem_io_read() accordingly, and update documentation. >> >> Signed-off-by:

Re: [Qemu-devel] [PATCH 23/38] ivshmem: Receive shared memory synchronously in realize()

Marc-André Lureau writes: > Hi > > On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: >> When configured for interrupts (property "chardev" given), we receive >> the shared memory from an ivshmem server. We do so asynchronously >> after

Re: [Qemu-devel] [PATCH 22/38] ivshmem: Plug leaks on unplug, fix peer disconnect

Marc-André Lureau writes: > Hi > > On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: >> close_peer_eventfds() cleans up three things: ioeventfd triggers if >> they exist, eventfds, and the array to store them. >> >> Commit 98609cd (v1.2.0)

Re: [Qemu-devel] [PATCH] target-arm: Fix translation level on early translation faults

On 02.03.2016 21:04, Sergey Sorokin wrote: > Qemu reports translation fault on 1st level instead of 0th level in case of > AArch64 address translation if the translation table walk is disabled or > the address is in the gap between the two regions. It's probably not a very clear description in

Re: [Qemu-devel] [PATCH 21/38] ivshmem: Disentangle ivshmem_read()

Marc-André Lureau writes: > On Wed, Mar 2, 2016 at 4:53 PM, Markus Armbruster wrote: +if (msg == -1) { +process_msg_shmem(s, fd); >>> >>> the previous code used to close fd if any, it's worth to keep that imho >> >> I'm blind.

Re: [Qemu-devel] [V6 1/4] hw/i386: Introduce AMD IOMMU

On 25/02/16 18:43, Marcel Apfelbaum wrote: On 02/21/2016 08:10 PM, David Kiarie wrote: Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU The IOMMU does basic translation, error checking and has a mininal IOTLB implementation Hi, Signed-off-by: David Kiarie

Re: [Qemu-devel] [PATCH v2 11/19] qapi: Add type.is_empty() helper

Eric Blake writes: > And use it in qapi-types and qapi-event. Down the road, we may > want to lift our artificial restriction of no variants at the > top level of an event, at which point, inlining our check for > whether members is empty will no longer be sufficient, but >

Re: [Qemu-devel] [PATCH 32/38] qdev: New DEFINE_PROP_ON_OFF_AUTO

Hi On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > Signed-off-by: Markus Armbruster > --- Reviewed-by: Marc-André Lureau > hw/core/qdev-properties.c| 10 ++ > include/hw/qdev-properties.h | 3 +++ >

Re: [Qemu-devel] [PATCH 33/38] ivshmem: Replace int role_val by OnOffAuto master

Hi On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > In preparation of making it a qdev property. > > Signed-off-by: Markus Armbruster > -- > hw/misc/ivshmem.c | 31 +++ > 1 file changed, 19 insertions(+), 12

Re: [Qemu-devel] [PATCH v2 10/19] qapi-visit: Factor out gen_visit_members_call()

Eric Blake writes: > Upcoming patches will be adding several contexts where we want > to handle the visit of an implicit type (an anonymous base type, > or an anonymous branch of a flat union) by directly inlining > the visit of each member of the implicit type. The work is

Re: [Qemu-devel] [PATCH 31/38] ivshmem: Inline check_shm_size() into its only caller

Hi On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > Improve the error messages while there. > > Signed-off-by: Markus Armbruster > --- I am not convinced this improves readibility much, I would cleanup a bit the function, but keep it. >

Re: [Qemu-devel] [PATCH 28/38] ivshmem: Tighten check of property "size"

On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > If size_t is narrower than 64 bits, passing uint64_t ivshmem_size to > mmap() truncates. Reject such sizes. > > Signed-off-by: Markus Armbruster > --- Reviewed-by: Marc-André Lureau

Re: [Qemu-devel] [PATCH 27/38] ivshmem: Simplify how we cope with short reads from server

Hi On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > Short reads from a UNIX domain sockets are exceedingly unlikely when > the other side always sends eight bytes and we always read eight > bytes. We cope with them anyway. However, the code doing that is > rather

Re: [Qemu-devel] [PATCH 26/38] ivshmem: Drop the hackish test for UNIX domain chardev

Hi On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > The chardev must be capable of transmitting SCM_RIGHTS ancillary > messages. We check it by comparing CharDriverState member filename to > "unix:". That's almost as brittle as it is disgusting. > > When the

Re: [Qemu-devel] [PATCH 25/38] ivshmem: Rely on server sending the ID right after the version

On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > The protocol specification (ivshmem-spec.txt, formerly > ivshmem_device_spec.txt) has always required the ID message to be sent > right at the beginning, and ivshmem-server has always complied. The > device, however,

Re: [Qemu-devel] [PATCH v2 09/19] qapi: Drop useless 'data' member of unions

Eric Blake writes: > Now that we no longer have any clients of the 'void *data' > member injected into unions, we can drop it. Update the > testsuite to drop the negative test union-clash-data, and > replace it with a positive test in qapi-schema-test that > proves that we no

Re: [Qemu-devel] [PATCH] target-i386: fix addr16 prefix

On 03/02/2016 07:04 AM, Paolo Bonzini wrote: > While ADDSEG will only be false in 16-bit mode for LEA, it can be > false even in other cases when 16-bit addresses are obtained via > the 67h prefix in 32-bit mode. In this case, gen_lea_v_seg forgets > to add a nonzero FS or GS base if CS/DS/ES/SS

Re: [Qemu-devel] [PATCH 24/38] ivshmem: Propagate errors through ivshmem_recv_setup()

On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > This kills off the funny state described in the previous commit. > > Simplify ivshmem_io_read() accordingly, and update documentation. > > Signed-off-by: Markus Armbruster > --- >

Re: [Qemu-devel] [PATCH v2 07/19] qapi: Avoid use of 'data' member of qapi unions

Eric Blake writes: > qapi code generators currently create a 'void *data' member as QAPI > part of the anonymous union embedded in the C struct corresponding > to a qapi union. However, directly assigning to this member of QAPI > the union feels a bit fishy, when we can

Re: [Qemu-devel] [PATCH 23/38] ivshmem: Receive shared memory synchronously in realize()

Hi On Mon, Feb 29, 2016 at 7:40 PM, Markus Armbruster wrote: > When configured for interrupts (property "chardev" given), we receive > the shared memory from an ivshmem server. We do so asynchronously > after realize() completes, by setting up callbacks with >

Re: [Qemu-devel] [PATCH v2 02/10] ipmi: replace IPMI_ADD_RSP_DATA() macro with inline helpers

On 03/02/2016 07:02 PM, Michael S. Tsirkin wrote: > On Wed, Mar 02, 2016 at 06:53:08PM +0100, Cédric Le Goater wrote: >>> typedef struct RspBuffer RspBuffer; >> >> OK. So that's the rule for structs in qemu. It is not that clear >> when you look at the code around. I will change. np. > > Did you

[Qemu-devel] [PATCH] target-arm: Fix translation level on early translation faults

Qemu reports translation fault on 1st level instead of 0th level in case of AArch64 address translation if the translation table walk is disabled or the address is in the gap between the two regions. Signed-off-by: Sergey Sorokin --- target-arm/helper.c | 1 + 1 file

Re: [Qemu-devel] [PATCH v2 05/19] util: Shorten references into SocketAddress

Eric Blake writes: > An upcoming patch will alter how simple unions, like SocketAddress, > are laid out, which will impact all lines of the form 'addr->u.XXX'. > To minimize the impact of that patch, use C99 initialization or a > temporary variable to reduce the number of

Re: [Qemu-devel] [PATCH v2 02/10] ipmi: replace IPMI_ADD_RSP_DATA() macro with inline helpers

On Wed, Mar 02, 2016 at 06:53:08PM +0100, Cédric Le Goater wrote: > > typedef struct RspBuffer RspBuffer; > > OK. So that's the rule for structs in qemu. It is not that clear > when you look at the code around. I will change. np. Did you look at CODING_STYLE? Pls do.

Re: [Qemu-devel] [PATCH v2 04/19] chardev: Shorten references into ChardevBackend

Eric Blake writes: > An upcoming patch will alter how simple unions, like ChardevBackend, > are laid out, which will impact all lines of the form 'backend->u.XXX'. > To minimize the impact of that patch, use a temporary variable to > reduce the number of lines needing

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